MAX5441(2001) Просмотр технического описания (PDF) - Maxim Integrated
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MAX5441 Datasheet PDF : 12 Pages
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+3V/+5V, Serial-Input,
Voltage-Output, 16-Bit DACs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), VREF = +2.5V, CL = 10pF, GND = 0, RL = ∞, TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
DYNAMIC PERFORMANCE—REFERENCE SECTION
Reference -3dB Bandwidth
BW Code = FFFF hex
1
MHz
Reference Feedthrough
Signal-to-Noise Ratio
SNR
Code = 0000 hex, VREF = 1VP-P at 100kHz
1
mVP-P
92
dB
Reference Input Capacitance
Code = 0000 hex
CINREF Code = FFFF hex
70
pF
170
STATIC PERFORMANCE—DIGITAL INPUTS
Input High Voltage
VIH
2.4
V
Input Low Voltage
VIL
0.8
V
Input Current
IIN
±1
µA
Input Capacitance
CIN (Note 6)
3
10
pF
Hysteresis Voltage
VH
0.15
V
POWER SUPPLY
MAX5443/MAX5444
Positive Supply Range (Note 7)
VDD
MAX5441/MAX5442
2.7
3.6
V
4.5
5.5
Positive Supply Current
IDD
All digital inputs at VDD or GND
0.12 0.20 mA
Power Dissipation
PD
All digital inputs at
VDD or GND
MAX5443/MAX5444
MAX5441/MAX5442
0.36
0.60
mW
TIMING CHARACTERISTICS
(VDD = +2.7V to +3.3V (MA5443/MAX5444) , VDD = +4.5V to +5.5V (MAX5441/MAX5442), VREF = +2.5V, GND = 0, CMOS inputs,
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Figure 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SCLK Frequency
SCLK Pulse Width High
SCLK Pulse Width Low
CS Low to SCLK High Setup
CS High to SCLK High Setup
SCLK High to CS Low Hold
SCLK High to CS High Hold
DIN to SCLK High Setup
DIN to SCLK High Hold
CLR Pulse Width Low
VDD High to CS Low
(power-up delay)
fCLK
tCH
tCL
tCSS0
tCSS1
tCSH0
tCSH1
tDS
tDH
tCLW
(Note 6)
25
MHz
20
ns
20
ns
15
ns
15
ns
35
ns
20
ns
15
ns
0
ns
20
ns
20
µs
Note 1: Gain error tested at VREF = +2.0V, +2.5V, and +3.0V (MAX5443/MAX5444) or VREF = +2.0V, +2.5V, +3.0V, and +5.5V
(MAX5441/ MAX5442).
Note 2: ROUT tolerance is typically ±20%.
Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance.
Note 4: Reference input resistance is code-dependent, minimum at 8555hex in unipolar mode, 4555hex in bipolar mode.
Note 5: Slew-rate value is measured from 10% to 90%.
Note 6: Guaranteed by design. Not production tested.
Note 7: Guaranteed by power-supply rejection test and Timing Characteristics.
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