MAX4326(1999) Просмотр технического описания (PDF) - Maxim Integrated

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MAX4326
(Rev.:1999)

Single/Dual/Quad, Low-Cost, SOT23, Low-Power, Rail-to-Rail I/O Op Amps

Maxim Integrated 

Single/Dual/Quad, Low-Cost, SOT23,

Low-Power, Rail-to-Rail I/O Op Amps

Pin Description

PIN

MAX4322

MAX4323

MAX4327

MAX4326

SOT23-5 SO/µMAX SOT23-6 SO/µMAX

µMAX SO

1

6

1

6

—

—

—

NAME

MAX4329

—

OUT

2

4

2

4

4

4

4

11

VEE

3

—

3

—

—

—

—

—

IN+

FUNCTION

Output

Negative Supply. Ground for

single-supply operation.

Noninverting Input

4

—

4

—

—

—

—

—

IN-

Inverting Input

5

7

6

7

8

10

14

4

VCC

Positive Supply

—

1, 5, 8

—

1, 5

—

—

5, 7, 8,

10

—

N.C.

No Connection

—

—

5

8

—

Shutdown Control. Tie high or

—

—

SHDN leave floating to enable

amplifier.

—

—

—

—

1, 7

1, 9 1, 13

1, 7

OUT1,

OUT2

Outputs for amps 1 and 2

—

2

—

2

2, 6

2, 8 2, 12

2, 6

IN1-, IN2-

Inverting Inputs for amps 1

and 2

—

3

—

3

3, 5

3, 7 3, 11

3, 5

IN1+, IN2+

Noninverting Inputs for amps

1 and 2

—

—

—

—

—

5, 6 5, 9

—

SHDN1,

SHDN2

Shutdown Control for amps 1

and 2. Tie high or leave float-

ing to enable amplifier.

—

—

—

—

—

—

—

8, 14

OUT3,

OUT4

Outputs for amps 3 and 4

—

—

—

—

—

—

—

9, 13

IN3-, IN4-

Inverting Inputs for amps 3

and 4

—

—

—

—

—

—

—

10, 12

IN3+, IN4+

Noninverting Inputs for amps

3 and 4

__________ Applications Information

Rail-to-Rail Input Stage

Devices in the MAX4322/MAX4323/MAX4326/MAX4327/

MAX4329 family of high-speed amplifiers have rail-to-

rail input and output stages designed for low-voltage,

single-supply operation. The input stage consists of

separate NPN and PNP differential stages, which com-

bine to provide an input common-mode range extend-

ing to the supply rails. The PNP stage is active for input

voltages close to the negative rail, and the NPN stage

is active for input voltages near the positive rail. The

input offset voltage is typically below 250µV. The

switchover transition region, which occurs near VCC / 2,

has been extended to minimize the slight degradation in

CMRR caused by the mismatch of the input pairs. Their

low offset voltage, high bandwidth, and rail-to-rail com-

mon-mode range make these op amps excellent choices

for precision, low-voltage, data-acquisition systems.

Since the input stage switches between the NPN and

PNP pairs, the input bias current changes polarity as

the input voltage passes through the transition region.

To reduce the offset error caused by input bias cur-

rents flowing through external source impedances,

match the effective impedance seen by each input

(Figures 1a, 1b). High source impedances, together

8 _______________________________________________________________________________________

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