DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MAX17083 Просмотр технического описания (PDF) - Maxim Integrated

Номер в каталоге
Компоненты Описание
производитель
MAX17083 Datasheet PDF : 15 Pages
First Prev 11 12 13 14 15
Low-Voltage, Internal Switch,
Step-Down Regulator
curve, while higher values result in higher full-load effi-
ciency (assuming that the coil resistance remains fixed)
and less output voltage ripple. Penalties for using high-
er inductor values include larger physical size and
degraded load-transient response (especially at low
input-voltage levels).
SMPS POR, UVLO, and Soft-Start
Power-on reset (POR) occurs when VCC rises above
approximately 2.1V, resetting the undervoltage, over-
voltage, and thermal-shutdown fault latches. The VCC
input undervoltage lockout (UVLO) circuitry prevents
the switching regulators from operating if the 5V bias
supply (VCC) is below its 4V UVLO threshold.
Soft-Startup
The internal step-down controller starts switching and the
output voltages ramp up using soft-start. If the bias supply
voltage drops below the UVLO threshold, the controller
stops switching and disables the drivers (LX becomes
high impedance) until the bias supply voltage recovers.
Once the 5V bias supply and IN rise above their respec-
tive input UVLO thresholds, and EN is pulled high, the
internal step-down controller becomes enabled and
begins switching. The internal voltage soft-starts gradu-
ally increment the feedback voltage by approximately
25mV every 61 switching cycles. Therefore, OUT reach-
es its nominal regulation voltage 1833/fSW after the regu-
lator is enabled (see the Soft-Start Waveforms in the
Typical Operating Characteristics section).
SMPS Power-Good Output (POK)
POK is the open-drain output of the window comparator
that continuously monitors the output for undervoltage
and overvoltage conditions. POK is actively held low in
shutdown (EN = GND) and during soft-start. Once the
soft-start sequence terminates, POK becomes high
impedance as long as the output remains within ±10%
of the nominal regulation voltage set by FB. POK goes
low once the output drops 12% (typ) below or rises 12%
(typ) above its nominal regulation point, or the output is
shut down. For a logic-level POK output voltage, con-
nect an external pullup resistor between POK and VCC.
A 100kΩ pullup resistor works well in most applications.
SMPS Fault Protection
Output Overvoltage Protection (OVP)
If the output voltage rises above 112% (typ) of its nomi-
nal regulation voltage, the controller sets the fault latch,
pulls POK low, shuts down the regulator, and immedi-
ately pulls the output to ground through its low-side
MOSFET. Turning on the low-side MOSFET with 100%
duty cycle rapidly discharges the output capacitors and
clamps the output to ground. However, this commonly
undamped response causes negative output voltages
due to the energy stored in the output LC at the instant
of 0V fault. If the load cannot tolerate a negative voltage,
place a power Schottky diode across the output to act
as a reverse-polarity clamp. If the condition that caused
the overvoltage persists (such as a shorted high-side
MOSFET), the input source also fails (short-circuit fault).
Cycle VCC below 1V or toggle the enable input to clear
the fault latch and restart the regulator.
Output Undervoltage Protection (UVP)
Each MAX17083 includes an output undervoltage
(UVP) protection circuit that begins to monitor the out-
put once the startup blanking period has ended. If the
output voltage drops below 88% (typ) of its nominal
regulation voltage, the regulator pulls the POK output
low and begins the UVP fault timer. Once the timer
expires after 1600/fSW, the regulator shuts down, forc-
ing the high-side off and disabling the low-side MOS-
FET once the zero-crossing threshold has been
reached. Cycle VCC below 1V, or toggle the enable
input to clear the fault latch and restart the regulator.
Thermal-Fault Protection
The MAX17083 features a thermal-fault protection
circuit. When the junction temperature rises above
+160°C (typ), a thermal sensor activates the fault latch,
pulls down the POK output, and shuts down the regu-
lator. Toggle EN to clear the fault latch, and restart the
controllers after the junction temperature cools by
15°C (typ).
SMPS Design Procedure
(Step-Down Regulator)
Firmly establish the input voltage range and maximum
load current before choosing a switching frequency
and inductor operating point (ripple-current ratio). The
primary design trade-off lies in choosing a good switch-
ing frequency and inductor operating point, and the fol-
lowing four factors dictate the rest of the design:
Input Voltage Range. The maximum value (VIN(MAX)),
and minimum value (VIN(MIN)) must accommodate
the worst-case conditions accounting for the input
voltage soars and drops. If there is a choice at all,
lower input voltages result in better efficiency.
Maximum Load Current. There are two values to
consider. The peak load current (ILOAD(MAX)) deter-
mines the instantaneous component stresses and fil-
tering requirements and thus drives output-capacitor
selection, inductor-saturation rating, and the design of
the current-limit circuit. The continuous load current
______________________________________________________________________________________ 11

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]