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M902-01 Просмотр технического описания (PDF) - Integrated Circuit Systems

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Компоненты Описание
производитель
M902-01
ICST
Integrated Circuit Systems ICST
M902-01 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Integrated
Circuit
Systems, Inc.
APPLICATION INFORMATION
This section includes information on the optional
external crystal and on the external loop filter.
The subsections on the loop filter provide example
component values and also briefly describe the SAW
PLL simulator tool and additional application
information available at www.icst.com.
External Crystal Specifications
If an external crystal is used with the on-chip crystal
oscillator circuit (XTAL OSC), the external crystal
should have the following general specifications:
Crystal Specifications
Parameter
Min Typ Max Unit
Crystal Type
AT-cut quartz
Mode of Oscillation
Fundamental
f0 Nominal Frequency Range
16
40 MHz
f/f0 Frequency Tolerance @+25 oC 1
±15
ppm
f/fC / TA Frequency Stability -40 to +85 oC 1 ±50
ppm
f/f0 / y Aging, per year (first) @+25 oC 1
ESR Equivalent Series Resistance
±5
ppm
50
CS Shunt Capacitance
Spurious Response (non-harmonic)
7 pF
-40 dBc
CL
Load Capacitance,
parallel load resonant
16
32 pF
P0 Drive Level
0.1
1.0 mW
Table 3: External Loop Filter Component Values
Note 1: These frequency tolerance specifications are suitable for
a ±100 ppm clock output frequency requirement.
The external crystal will be applied to the XTAL_1 / REF_IN
and XTAL_2 input pins. External crystal load capacitors
are also required.
Recommended External Crystal Configuration
M9x0x2--00x1
XTAL
XTAL_1 / REF_IN
C1
XTAL_2
C2
XTAL OSC
M902-01
VCSO BASED GBE CLOCK GENERATOR
Product Data Sheet
External Loop Filter
To provide stable PLL operation, and thereby a low jitter
output clock, the M902-01 requires the use of an
external loop filter. This is provided via the provided
filter pins (see Figure 5).
RLOOP CLOOP
RPOST
RLOOP CLOOP
RPOST
CPOST
CPOST
OP_IN nOP_IN
49
OP_OUT nOP_OUT nVC VC
85
67
Figure 5: External Loop Filter
The loop filter is implemented as a differential circuit
to minimize system noise interference. Due to the
differential signal path design, the implementation
requires two identical complementary RC filters as
shown here. See Table 4, External Loop Filter
Component Values, below.
External Loop Filter Component Values
PLL Bandwidth Damping R loop C loop R post C post
(kHz)
Factor (k) (µF) (k) (pF)
0.5
3.0
1.5 4.70 20 150
1.5 1
3.3
4.7 1.00 10 150
2.1 2
1.1
4.7 0.10 10 150
6.4
4.5 20.0 0.10 20 270
10.6 3
4.2 33.0 0.03 20 120
Table 4: External Loop Filter Component Values
Note 1: Optimum loop bandwidth when using an external reference
crystal. Will help to attenuate interference on the crystal’s
sinusoidal clock waveform and therefore will minimize
device output clock jitter.
Note 2: Alternative loop filter setting when using an external refer-
ence crystal. Smaller C loop lowers loop damping factor with
negligible increase in output jitter.
Note 3: Optimum loop bandwidth when using an external reference
crystal oscillator. The square wave clock reference does not
require as much jitter attenuation, which allows for a wider
loop bandwidth and improved system noise tolerance.
Refer to the M902-01 product web page at
www.icst.com/products/summary/m902-01.htm for
additional product information.
Figure 4: Recommended External Crystal Configuration
XTAL= 25 or 30 MHz, Load Capacitance Specification = 18 pF
C1 = 27 pF
C2 = 33 pF
External load capacitors C1 and C2 present a load of 15 pf
to the crystal (they are seen in series by the crystal through
the common ground connection). With the additional of PCB
trace capacitance and M902-01 input capacitance, the total
load to the crystal is about 18 pf.
M902-01 Datasheet Rev 2.1
4 of 8
Revised 24Jun2004
Integrated Circuit Systems, Inc. Networking & Communications www.icst.com tel (508) 852-5400

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