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76105DK8 Просмотр технического описания (PDF) - Fairchild Semiconductor

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76105DK8 Datasheet PDF : 12 Pages
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HUF76105DK8
Test Circuits and Waveforms (Continued)
VDS
RL
VGS
Ig(REF)
DUT
+
VDD
-
FIGURE 19. GATE CHARGE TEST CIRCUIT
VDD
VDS
Qg(TOT)
VGS
VGS = 1V
0
Qg(5)
Qg(TH)
VGS = 5V
VGS = 10
Ig(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
VDS
RL
VGS
RGS
DUT
+
VDD
-
VGS
FIGURE 21. SWITCHING TIME TEST CIRCUIT
Thermal Resistance vs. Mounting Pad
Area
The maximum rated junction temperature, TJM, and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, PDM, in an
application. Therefore the application’s ambient temperature,
TA (oC), and thermal resistance RθJA (oC/W) must be
reviewed to ensure that TJM is never exceeded. Equation 1
mathematically represents the relationship and serves as
the basis for establishing the rating of the part.
PDM = (---T----J--Z-M---θ---J-–---A-T----A-----)
(EQ. 1)
In using surface mount devices such as the SOP-8 package,
the environment in which it is applied will have a significant
influence on the part’s current and maximum power
dissipation ratings. Precise determination of PDM is complex
and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
10%
VGS
10%
0
50%
PULSE WIDTH
90%
50%
FIGURE 22. SWITCHING TIME WAVEFORMS
2. The number of copper layers and the thickness of the board
3. The use of external heat sinks
4. The use of thermal vias
5. Air flow and board orientation
6. For non-steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in
Fairchild provides thermal information to assist the designer’s
preliminary application evaluation. Figure 23 defines the RθJA
for the device as a function of the top copper (component side)
area. This is for a horizontally positioned FR-4 board with 1oz
copper after 1000 seconds of steady state power with no air
flow. This graph provides the necessary information for
calculation of the steady state junction temperature or power
dissipation. Pulse applications can be evaluated using the
Fairchild device Spice thermal model or manually utilizing the
normalized maximum transient thermal impedance curve.
Displayed on the curve are RθJA values listed in the Electrical
Specifications table. The points were chosen to depict the
compromise between the copper board area, the thermal
resistance and ultimately the power dissipation, PDM.
©2003 Fairchild Semiconductor Corporation
HUF76105DK8 Rev. B1

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