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M65582AMF Просмотр технического описания (PDF) - Renesas Electronics

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M65582AMF
Renesas
Renesas Electronics Renesas
M65582AMF Datasheet PDF : 46 Pages
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M65582AMF-XXXFP
Sub
address
Data
Bit
Function
Description
30h D5-D6 2 14H CLK DLY
4fsc clock delay adjust (0: none –— 3: delay)
D7 1 INV 14H CLK
4fsc clock polarity (0: none, 1: invert)
32h D1 1 UV LPF ON
UV LPF (digital) enable
D2 1 ABL SEL
ABL function (0: enable, 1: disenable)
D6 1 VJP SW
Jump SW enable
D7 1 VJP Width
Jump pulse width (0: normal, 1: wide +2-line)
33h D0-D3 4 Black Stretch Time 2 Black stretch recover time (0: slow –— F: fast)
D4-D7 4 Black Stretch Time 1 Black stretch attack time (0: slow –— F fast)
34h D2-D3 2 ABL Speed
ABL processing speed (0: X1, 1: X2, 2: X4, 3: X8)
D4 1 DS D/A Dither
∆Σ D/A (for V-Ramp and E-W) dither enable
D5-D6 2 DS D/A CLK CTL
∆Σ D/A (for V-Ramp and E-W) clock select (0: 28M, 1: 24M, 2: 14M, 3: 16M)
35h D0-D3 4 ABL ASPE
ABL attack speed (0: slow –— 7: fast)
D4-D7 4 ABL SPE
ABL recover speed (0: slow –— 7: fast)
36h D0-D3 4 ABL Gain
ABL gain control (0: minimum –— 7: maximum)
D4-D6 3 ABL Time Constant ABL time constant (0: slow –— 7: fast)
37h D0-D1 2 ABL ASPE 2
ABL attack speed 2 (0: slow –— 7: fast)
D2 1 UV Dither ON
UV dither enable
D3-D5 3 UV Dither Test Enable UV dither test select
38h D0-D5 6 AKB P
AKB reference pulse height (00: minimum –— 3F: maximum)
D6 1 EHT Gain
EHT gain up (0: normal, 1: high)
D7 1 AKB Mode
AKB mode select (0: differential mode, 1: absolute mode)
39h D0 1 YCS HBPF Front
Y/C separation front BPF band width (0: wide, 1: narrow)
D1-D2 2 YCS HBPF Back
Y/C separation rear BPF band width (0: none, 1: wide –— 2 and 3: narrow)
3Ah D0-D5 6 Sharpness Overshoot Gain Sharpness overshoot gain (00: soft –— 3F: sharp)
3Bh D0-D5 6 Sharpness Preshoot Gain Sharpness preshoot gain (00: soft –— 3F: sharp)
3Dh D0 1 Black Stretch SW
Black stretch SW (0: disenable, 1: enable)
D1-D3 3 Black Stretch Depth Black stretch depth (0: shallow –— 7: deep)
D6 1 BS T2 IF ON
Black stretch recover time constant (0: slow, 1: fast)
D4-D5 10 THR NZV
Noise detection threshold level in field (000: minimum –— 3FF: maximum)
3Eh D0-D7
3Fh D0-D7 16 THR NZH
Noise detection threshold level in line (0000: minimum –— FFFF: maximum)
40h D0-D7
41h D0-D6 7 Killer Level
Color Killer threshold level (00: deep –— 7F: shallow)
42h D0-D5 6 RRAY
R-Y phase offset (00: 0˚ –— 3F: 90˚)
D6-D7 2 AMP CTL
Analog ACC amp maximum gain (0: 0dB –— 3: +30dB)
43h D0-D7 9 AMP1 OFF
Analog ACC amp #1 on >off level (000: minimum –— 1FF: maximum)
44h D7
D0-D6 7 AMP1 ON
Analog ACC amp #1 off >on level (00: minimum –— 7F: maximum)
45h D0-D3 4 MV
Macro vision (burst) detect level
D4 1 MV1 SW
Macro vision (burst) detect enable
D5 1 MV2 SW
Macro vision (burst) detect position
D6 1 ACC SW
ACC enable
46h D0-D4 5 BGP POS
BGP (for chroma decoder) position
D5 1 Killer SW
Killer detector mode select (0: synchronous detect, 1: amplitude detect)
D6 1 HD SW
HD out (for OSD) select (0: FBP, 1: AFC1 pulse)
D7 1 4FSC SW
A/D-LOGIC clock swap
47h D0-D1 2 AVE SEL
Chroma decoder time constant (0: 32H, 1: 16H, 2: 8H, 3: 1H)
D2-D3 2 C Delay
Chroma delay time (0: none –— 3: delay)
D4 1 OSD Limit
OSD limit select
D6 1 Clamp BITSEL
Y digital clamp time constant (0: fast, 1: slow)
D7 1 Force Killer
Forced killer
48h D0-D1 2 B2 AVE SEL
Accumulation time control of demodulation
D2-D3 2 AMP TIM
Analog ACC hysteresis select
D4-D6 3 V Mask Time
V masking time for demodulation
D7 1 AMP3 ACC
ACC maximum gain
49h D0-D3 4 Free Run Offset
VCXO free-run frequency adjust
D4 1 UV Gain
U/V gain up
D5 1 YUV UV Inv.
U/V invert
D6 1 YUV CXUV
YC/YUV select
D7 1 YUV MPX SEL
U/V multiplex select (0: 2fsc, 1: fsc)
4Bh D0-D1 2 Killer Threshold
PLL stop burst level
4Ch D0-D5 6 BG Start
BGP (for PLL) timing control
D6 1 Free Run
VCXO force free-run
D7 1 SWAP
Burst PLL polarity (0: reverse, 1: normal)
4Dh D0-D1 2 BW DET
PLL Killer threshold level
Note
V Latch
V Latch
Rev.1.0, Sep.19.2003, page 11 of 45

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