M65582AMF Просмотр технического описания (PDF) - Renesas Electronics
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M65582AMF Datasheet PDF : 46 Pages
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M65582AMF-XXXFP
I2C bus function
Sub
address
Data
Bit
Function
Description
00h D0 1 H STOP
H pulse stop
D1-D2 2 Power Down
Power Down control (0: normal, 1: PD0, 2: PD1, 3: PD2)
D3 1 V STOP
V output stop
01h D0 1 Line-delay Number Y/C separation mode (0: 3-line mode, 1: 2-line mode)
D2 1 SAW Filter
Chroma BPF to high
D3-D7 5 Input Video SW
Input video SW (01: TV1 IN, 02: TV2 IN, 04: TV3 IN, 08: Y/C IN, 10: YUV IN)
02h D3-D4 2 VRT Voltage
A/D Reference (0: 1.1V, 1: 1.2V, 2: 1.3V, 3: 1.4V)
D7 1 Pedestal Clamp
Input clamp select (0: pedestal clamp, 1: sync-tip clamp)
04h D0-D3 4 Sharpness Noise coring level Sharpness coring level (0: minimum –— F: maximum)
D4-D5 2 Aperture Frequency Sharpness f0 (0: 2-clk <—> 3: 5-clk)
05h D0-D3 4 Sharpness Max Gain Sharpness limiter level (0: minimum –— F: maximum)
D4-D7 4 EHT
EHT gain control (0: minimum –— F: maximum)
06h D0-D3 4 YNR Coring Level
YNR limiter level (0: minimum –— F: maximum)
D4 1 YNR SW
YNR enable
D5-D6 2 Y Delay
Y delay time (0: 0nsec–— 3: 210nsec)
08h D0-D6 7 Tint
Tint level control (00: -45˚ –— 7F: +45˚)
09h D0-D6 7 Color
Color level control (00: 0% –— 7F: 200%)
0Ah D0-D6 7 Contrast
Contrast control (00: 0% –— 7F: 200%)
0Bh D0-D5 6 OSD Level (R)
R OSD level (00: 0% –— 7F: maximum)
D6-D7 2 Half Tone
Half tone level control (Picture/OSD ratio 0: 50%/50% –— 3: 12.5%/87.5%)
0Ch D0-D5 6 OSD Level (G)
G OSD level (00: 0% –— 7F: maximum)
D6-D7 2 RGB MTX
RGB matrix ratio (0: 12/8, 1: 13/8, 2: 14/8, 3: 14/8)
0Dh D0-D5 6 OSD Level (B)
B OSD level (00: 0% –— 7F: maximum)
D6-D7 2 OSD COMP
Contrast clip level for OSD (0: low –— 3: high)
0Eh D0-D7 8 Brightness
Brightness control (00: -50% –— 7F: +50%)
0Fh D0-D5 6 H AFC2 Phase
H position (00: +2.6µsec –— 7F: -2.6µsec)
D6 1 H AFC Gain
AFC1 Gain (0: low, 1: high)
D7 1 AFC Free Run
AFC1 Force free-run
10h D0 1 Y Mute
Y output mute
D1 1 C BPF Fix
Chroma signal generate from H/V BPF only
D2 1 B OUT Mute
B output mute
D3 1 G OUT Mute
G output mute
D4 1 Y 2D Fix
Y signal generate from 2DYCS
D5 1 R OUT Mute
R output mute
D6 1 Y THR 2D
Y signal through 2D YCS
D7 1 RGB P-ON Mute
RGB output mute
11h D0-D1 2 ALFA
Adaptive detection sensitivity (0: minimum –— 3: maximum)
D2-D3 1 MANEXP
Y/C separation force select (0: adaptive, 2: V, 3: H/V)
12h D0-D1 2 Gamma
Gamma control (0: none –— 3: deep)
D2-D3 2 Blue Stretch
Blue stretch control (0: none –— 3: deep)
D4-D5 2 FSC ORG
Chroma decoder phase select
D6 1 FSC SEL
Chroma decoder clock select
D7 1 RGB ON
RGB output (0: RGB mute except OSD, 1: RGB output)
13h D0 1 H Free Up
AFC1 Free-run frequency up (about 700Hz)
D1 1 H OUT Duty
H pulse width (0: 25µsec, 1: 19µsec)
14h D0-D5 6 V Size
V ramp amplitude (00: -20% –— 3F: +20%)
D7 1 V BLK Stop
V blanking off
15h D0-D5 6 V Linearity
V linearity (00: -3% –— 3F: +3%)
16h D0-D7 9 Cutoff (R)
R cutoff control (000: dark –— 1FF: light)
17h D7
D0-D6 7 Drive (R)
R drive control (00: -2.5dB –— 7F: +3.5dB)
18h D0-D7 9 Cutoff (G)
G cutoff control (000: dark –— 1FF: light)
19h D7
D0-D6 7 Drive (G)
G drive control (00: -2.5dB –— 7F: +3.5dB)
1Ah D0-D7 9 Cutoff (B)
B cutoff control (000: dark –— 1FF: light)
1Bh D7
D0-D6 7 Drive (B)
B drive control (00: -2.5dB –— 7F: +3.5dB)
1Ch D0-D3 4 Analog Monitoring Point Intelligent monitoring output select (Analog)
1Dh D0-D4 5 Digital Monitoring Point Intelligent monitoring output select (Digital)
D5 1 TEST I/O
Intelligent monitoring output enable (Digital)
30h D0-D1 2 A/D CLK DLY
A/D clock delay adjust (0: none –— 3: delay)
D2-D3 2 DS CLK DLY
∆Σ D/A (for V-ramp and E-W) clock delay adjust (0: none –— 3: delay)
D4 1 INV DS CLK
∆Σ D/A (for V-ramp and E-W) clock polarity (0: none –— 1: invert)
Note
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
V Latch
Rev.1.0, Sep.19.2003, page 10 of 45
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