M5M5V216ATP Просмотр технического описания (PDF) - Renesas Electronics
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M5M5V216ATP Datasheet PDF : 9 Pages
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revision-03, 14.Jan.'03
M5M5V216ATP,RT
MITSUBISHI LSIs
2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM
FUNCTION
The M5M5V216ATP,RT is organized as 131,072-words by
When setting BC1 and BC2 at a high lev el or S at a high
16-bit. These dev ices operate on a single +2.7~3.6V power lev el, the chips are in a non-selectable mode in which both
supply , and are directly TTL compatible to both input and reading and writing are disabled. In this mode, the output
output. Its f ully static circuit needs no clocks and no stage is in a high-impedance state, allowing OR-tie with
ref resh, and makes it usef ul.
other chips and memory expansion by BC1, BC2 and S.
The operation mode are determined by a combination of
The power supply c urrent is reduced as low as 0.3µA(25 C,
the dev ice control inputs BC1 , BC2 , S , W and OE. ty pical), and the memory data can be held at +2V power
Each mode is summarized in the f unction table.
supply , enabling battery back-up operation during power
A write operation is executed whenev er the low lev el W f ailure or power-down operation in the non-selected mode.
ov erlaps with the low lev el BC1 and/or BC2 and the low
lev el S. The address(A0~A16) must be set up bef ore the FUNCTION TABLE
write cy c le and must be stable during the entire cy c le.
A read operation is executed by s etting W at a high lev el
and OE at a low lev el while BC1 and/or BC2 and S are in
an activ e state(S=L).
When setting BC1 at the high lev el and other pins are in
S BC1 BC2 W OE Mode DQ1~8 DQ9~16 Icc
H X X X X Non selection High-Z High-Z Standby
L H H X X Non selection High-Z High-Z Standby
L L H L X Write Din High-Z Activ e
an activ e stage , upper-by te are in a selesctable mode in
L L H H L Read Dout High-Z Activ e
which both reading and writing are enabled, and lower-byte
LL
are in a non-selectable mode. And when setting BC2 at a
high lev el and other pins are in an activ e stage, lower-
by t e are in a selectable mode and upper-by te are in a
non-selectable mode.
LH
LH
LH
LL
Note : "H" and "L" in this table mean VIH or VIL. L L
"X" in this table should be "H" or "L".
BLOCK DIAGRAM
LL
H HH
L LX
L HL
L HH
L LX
L HL
L HH
Write
Read
Write
Read
High-Z High-Z
High-Z Din
High-Z Dout
High-Z High-Z
Din Din
Dout Dout
High-Z High-Z
Activ e
Activ e
Activ e
Activ e
Activ e
Activ e
Activ e
A0
DQ
1
A1
MEMORY ARRAY
DQ
8
131072 WORDS
x 16 BITS
A15
-
DQ
9
A16
CLOCK
GENERATOR
DQ
16
S
BC1
BC2
W
OE
Vcc
GND
2
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