M48Z512BV(2011) Просмотр технического описания (PDF) - STMicroelectronics

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Компоненты Описание

производитель

M48Z512BV
(Rev.:2011)

3.3 V, 4 Mbit (512 K x 8 bit) ZEROPOWER® SRAM

STMicroelectronics 

Operating modes

M48Z512BV

Figure 4. Chip enable or output enable controlled, READ mode AC waveforms

A0-A18

tAVAV

VALID

tAVQV

tELQV

tAXQX

tEHQZ

E

tELQX

tGLQV

tGHQZ

G

t(s) DQ0-DQ7

tGLQX

DATA OUT

roduc 1. WRITE enable (W) = high.

P Figure 5. Address controlled, READ mode AC waveforms

lete A0-A18

) - Obso DQ0-DQ7

tAVQV

tAVAV

DATA VALID

Obsolete Product(s 1. Chip enable (E) and output enable (G) = low, WRITE enable (W) = high.

AI01221

tAXQX

AI01220

8/21

Doc ID 14885 Rev 3

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