M48T559Y
Table 4. AC Measurement Conditions
Input Rise and Fall Times
≤ 5ns
Input Pulse Voltages
0 to 3V
Input and Output Timing Ref. Voltages
1.5V
Note that Output Hi-Z is defined as the point where data is no longer
driven.
Figure 4. AC Testing Load Circuit
5V
DEVICE
UNDER
TEST
1kΩ
1.9kΩ
OUT
CL = 100pF
CL includes JIG capacitance
AI01673
Table 5. Capacitance (1, 2)
(TA = 25 °C, f = 1 MHz)
Symbol
Parameter
CIN
Input Capacitance
CIO (3) Input / Output Capacitance
Note: 1. Effective capacitance measured with power supply at 5V.
2. Sampled only, not 100% tested.
3. Outputs deselected.
Test Condition
VIN = 0V
VOUT = 0V
Table 6. DC Characteristics
(TA = 0 to 70 °C; VCC = 4.5V to 5.5V)
Symbol
Parameter
Test Condition
ILI (1) Input Leakage Current
0V ≤ VIN ≤ VCC
ILO (1) Output Leakage Current
0V ≤ VOUT ≤ VCC
ILRST (2) Input Leakage Current
0V ≤ VIN ≤ VCC
ICC Supply Current
Outputs open
ICC1 Supply Current (Standby) TTL
E = VIH
ICC2 (3) Supply Current (Standby) CMOS
E = VCC – 0.2V
VIL (4) Input Low Voltage
VIH Input High Voltage
Output Low Voltage
VOL
Output Low Voltage (IRQ/FT) (5)
IOL = 2.1mA
IOL = 10mA
VOH (6) Output High Voltage
IOH = –1mA
Note: 1. Outputs deselected.
2. Input leakage current on input RESET pins.
3. AD0-AD7, AS0, AS1 active when E is high and VCC > VPFD.
4. Negative spikes of –1V allowed for up to 10ns once per cycle.
5. The IRQ pins is Open Drain.
6. Measured with Control Bits set as follows: R = '1'; W, ST, FT = '0'.
4/18
Min
Max
Unit
10
pF
10
pF
Min
–0.3
2.2
2.4
Max
±1
±5
100
50
10
7
0.8
VCC + 0.3
0.4
0.4
Unit
µA
µA
µA
mA
mA
mA
V
V
V
V
V