M48T559YMH1TR Просмотр технического описания (PDF) - STMicroelectronics
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M48T559YMH1TR Datasheet PDF : 18 Pages
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M48T559Y
Figure 2. SOIC Connections
RST
WDI
RSTIN1
RSTIN2
DU
NC
NC
NC
NC
AD0
AD1
AD2
VSS
VSS
1
28
2
27
3
26
4
25
5
24
6
23
7
22
M48T559Y
8
21
9
20
10
19
11
18
12
17
13
16
14
15
AI01675B
VCC
W
IRQ/FT
DU
DU
AS1
AS0
R
E
AD7
AD6
AD5
AD4
AD3
Table 1. Signal Names
AD0-AD7
Address/Data
AS0-AS1
Address Strobes
W
Write Enable
R
Read Enable
E
Chip Enable
WDI
Watchdog Input
RSTIN1-RSTIN2 Reset Input
RST
Power Fail Reset Output
(Open Drain)
IRQ/FT
Interrupt / Frequency Test
Output (Open Drain)
VCC
Supply Voltage
VSS
Ground
NC
Not Connected Internally
DU
Don’t Use must be connected
to VCC or VSS
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
0 to 70
°C
TSTG
Storage Temperature (VCC Off, Oscillator Off)
–40 to 85
°C
VIO
Input or Output Voltages
–0.3 to 7
V
VCC
Supply Voltage
–0.3 to 7
V
IO
Output Current
20
mA
PD
Power Dissipation
1
W
Note: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of
this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect reliability.
CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
Insertion of the SNAPHAT housing after reflow
prevents potential battery and crystal damage due
to the high temperatures required for device sur-
face-mounting. The SNAPHAT housing is keyed
to prevent reverse insertion.
The SOIC and battery/crystal packages are
shipped separately in plastic anti-static tubes or in
Tape & Reel form. For the 28 lead SOIC, the bat-
tery/crystal package (i.e. SNAPHAT) part number
is "M4T28-BR12SH1".
Caution: Do not place the SNAPHAT battery/crys-
tal top in conductive foam, as this will drain the lith-
ium button-cell battery.
As Figure 3 shows, the static memory array and
the quartz controlled clock oscillator of the
M48T559Y are integrated on one silicon chip. The
two circuits are interconnected at the upper eight
memory locations to provide user accessible
BYTEWIDE™ clock information in the bytes with
addresses 1FF8h-1FFFh. The clock locations
contain the year, month, date, day, hour, minute,
and second in 24 hour BCD format. Corrections for
28, 29 (leap year), 30, and 31 day months are
made automatically. Byte 1FF8h is the clock con-
trol register. This byte controls user access to the
clock information and also stores the clock calibra-
tion setting.
The eight clock bytes are not the actual clock
counters themselves; they are memory locations
consisting of BiPORT™ read/write memory cells.
The M48T559Y includes a clock control circuit
which updates the clock bytes with current infor-
2/18
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