IC62LV1008LL-70BI Просмотр технического описания (PDF) - Integrated Circuit Solution Inc

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IC62LV1008LL-70BI

1 M x 8 bit Low Voltage and Ultra Low Power CMOS Static RAM

Integrated Circuit Solution Inc 

IC62LV1008L

IC62LV1008LL

AC TEST LOADS

READ CYCLE NO.1(1,2) (Address controlled, CE1 = OE = VIL , CE2 = VIH)

ADDRESS

DOUT

t RC

PREVIOUS DATA VALID

t OHA

t AA

t OHA

DATA VALID

AC WAVEFORMS

READ CYCLE NO. 2(1,3) (CE1, OE, CE2 controlled)

ADDRESS

OE

CE1

CE2

DOUT

tRC

tAA

tDOE

tLZOE

tACE1/tACE2

tLZCE1/

tLZCE2

HIGH-Z

tOHA

tHZOE

tHZCE

DATA VALID

Notes:

1. WE is HIGH for a Read Cycle.

2. The device is continuously selected. OE, CE1 = VIL, CE2 = VIH.

3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions.

Integrated Circuit Solution Inc.

7

LPSR015-0A 1/3/2002

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