M36W0R6040B0 Просмотр технического описания (PDF) - STMicroelectronics

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M36W0R6040B0

64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 16 Mbit (1Mb x16) PSRAM, Multi-Chip Package

STMicroelectronics 

M36W0R6040T0, M36W0R6040B0

FUNCTIONAL DESCRIPTION

The Flash Memory and PSRAM components have

separate power supplies but share the same

grounds. They are distinguished by three Chip En-

able inputs: EF for the Flash memory and E1P and

E2P for the PSRAM.

Recommended operating conditions do not allow

more than one device to be active at a time. The

most common example is simultaneous read oper-

ations on the Flash memory and the PSRAM

which would result in a data bus contention.

Therefore it is recommended to put the other de-

vices in the high impedance state when reading

the selected device.

Figure 4. Functional Block Diagram

VDDF VPPF VDDQ

A20-A21

A0-A19

EF

GF

WF

LF

KF

RPF

WPF

64 Mbit

Flash

Memory

WAITF

DQ0-DQ15

VDDP

E1P

GP

WP

E2P

UBP

LBP

16 Mbit

PSRAM

VSS

8/18

AI08449

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