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M34C02-LDW1G Просмотр технического описания (PDF) - STMicroelectronics

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M34C02-LDW1G Datasheet PDF : 31 Pages
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Signal description
Figure 5. I2C bus protocol
SCL
M34C02-W, M34C02-L, M34C02-R
SDA
START
Condition
SDA
Input
SDA
Change
STOP
Condition
SCL
SDA
1
2
3
MSB
7
8
9
ACK
START
Condition
SCL
1
2
3
7
8
9
SDA
MSB
ACK
STOP
Condition
AI00792B
Table 2.
Device Select Code
Device Type Identifier(1)
Chip Enable Address(2) RW
b7
b6
b5
b4
b3
b2
b1
b0
Memory Area Select Code
(two arrays)
1
0
1
0
E2
E1
E0
RW
Protection Register Select
Code
0
1
1
0
E2
E1
E0
RW
1. The most significant bit, b7, is sent first.
2. E0, E1 and E2 are compared against the respective external pins on the memory device.
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