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To conserve pins, the line attenuation output is encoded as
a simple serial bit stream. Table 4 provides the decoded
output for each equalizer setting. Figure 5 is a typical
decoding circuit for the LATN output. It uses a 2-bit syn-
chronous counter (half of a 4-bit counter) with synchronous
reset, and a pair of flip-flops. Table 5 lists approved crys-
tals and transformers.
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