LXT300Z Просмотр технического описания (PDF) - Level One

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LXT300Z

Advanced T1/E1 Short-Haul Transceivers

Level One 

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The LXT300Z and LXT301Z are fully integrated PCM

transceivers for both 1.544 Mbps (DSX-1) and 2.048

Mbps (E1) applications. Both transceivers allow full-

duplex transmission of digital data over existing twisted-

pair installations. The first page of this data sheet shows a

simplified block diagram of the LXT300Z; Figure 2

shows the LXT301Z. The LXT301Z is similar to the

LXT300Z, but does not incorporate the Jitter Attenuator

and associated Elastic Store, or the serial interface port.

The LXT300Z and LXT301Z transceivers each interface

with two twisted-pair lines (one twisted-pair for transmit,

one twisted-pair for receive) through standard pulse trans-

formers and appropriate resistors.

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The LXT300Z and LXT301Z are low-power CMOS

devices. Each operates from a single +5 V power supply

which can be connected externally to both the transmitter

and receiver. However, the two inputs must be within ± .3V

of each other, and decoupled to their respective grounds

separately. Refer to Application Information for typical

decoupling circuitry. Isolation between the transmit and

receive circuits is provided internally.

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Upon power up, the transceiver is held static until the

power supply reaches approximately 3 V. Upon crossing

this threshold, the device begins a 32 ms reset cycle to cal-

ibrate the transmit and receive delay lines and lock the

Phase Lock Loop to the receive line. A reference clock is

required to calibrate the delay lines. The transmitter refer-

ence is provided by TCLK. MCLK provides the receiver

reference for the LXT301Z. The crystal oscillator pro-

vides the receiver reference in the LXT300Z. If the

LXT300Z crystal oscillator is grounded, MCLK is used as

the receiver reference clock.

The transceiver can also be reset from the Host or Hard-

ware Mode. In Host Mode, reset is commanded by simul-

taneously writing RLOOP and LLOOP to the register. In

Hardware Mode, reset is commanded by holding RLOOP

and LLOOP High simultaneously for 200 ns. Reset is ini-

tiated on the falling edge of the reset request. In either

mode, reset clears and sets all registers to 0 and then begins

calibration.

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