LXT300Z Просмотр технического описания (PDF) - Level One

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LXT300Z

Advanced T1/E1 Short-Haul Transceivers

Level One 

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INT

'2 ,QWHUUXSW õ+RVW 0RGHôï This LXT300Z Host Mode output goes Low to flag the host

processor when LOS or DPM go active. INT is an open-drain output and should be tied

to power supply RV+ through a resistor. INT is reset by clearing the respective register

bit (LOS and/or DPM).

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', (TXDOL]HU &RQWURO ì õ+î: 0RGHôï The signal applied at this pin in the LXT300Z Hard-

ware Mode and LXT301Z is used in conjunction with EC2 and EC3 inputs to determine

shape and amplitude of AMI output transmit pulses.

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', 6HULDO 'DWD ,Q õ+RVW 0RGHôï The serial data input stream is applied to this pin when the

LXT300Z operates in the Host Mode. SDI is sampled on the rising edge of SCLK.

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', (TXDOL]HU &RQWURO ë õ+î: 0RGHôï The signal applied at this pin in the LXT300Z Hard-

ware Mode and LXT301Z is used in conjunction with EC1 and EC3 inputs to determine

shape and amplitude of AMI output transmit pulses.

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6'2

'2 6HULDO 'DWD 2XW õ+RVW 0RGHôï The serial data from the on-chip register is output on

this pin in the LXT300Z Host Mode. If CLKE is High, SDO is valid on the rising edge

of SCLK. If CLKE is Low SDO is valid on the falling edge of SCLK. This pin goes to

a high-impedance state when the serial port is being written to and when CS is High.

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', (TXDOL]HU &RQWURO ê õ+î: 0RGHôï The signal applied at this pin in the LXT300Z Hard-

ware Mode and LXT301Z is used in conjunction with EC1 and EC2 inputs to determine

shape and amplitude of AMI output transmit pulses.

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CS

', &KLS 6HOHFW õ+RVW 0RGHôï This input is used to access the serial interface in the

LXT300Z Host Mode. For each read or write operation, CS must transition from High

to Low, and remain Low.

5/223

', 5HPRWH /RRSEDFN õ+î: 0RGHôï This input controls loopback functions in the

LXT300Z Hardware Mode and LXT301Z. Setting RLOOP High enables the Remote

Loopback mode. Setting both RLOOP and LLOOP High causes a Reset.

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', 6HULDO &ORFN õ+RVW 0RGHôï This clock is used in the LXT300Z Host Mode to write data

to or read data from the serial interface registers.

//223

', /RFDO /RRSEDFN õ+î: 0RGHôï This input controls loopback functions in the LXT300Z

Hardware Mode and LXT301Z. Setting LLOOP High enables the Local Loopback

Mode.

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', &ORFN (GJH õ+RVW 0RGHôï Setting CLKE High causes RPOS and RNEG to be valid on

the falling edge of RCLK, and SDO to be valid on the rising edge of SCLK. When

CLKE is Low, RPOS and RNEG are valid on the rising edge of RCLK, and SDO is

valid on the falling edge of SCLK.

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', 7UDQVPLW $OO 2QHV õ+î: 0RGHôï When High, TAOS causes the LXT300Z (Hardware

Mode) and LXT301Z to transmit a continuous stream of marks at the TCLK frequency.

Activating TAOS causes TPOS and TNEG inputs to be ignored. TAOS is inhibited dur-

ing Remote Loopback.

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