LXT972M Просмотр технического описания (PDF) - Intel
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LXT972M Datasheet PDF : 92 Pages
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Intel® LXT972M Single-Port 10/100 Mbps PHY Transceiver
5.8.6 10BASE-T SQE (Heartbeat) .................................................................. 51
5.8.7 10BASE-T Jabber .................................................................................. 51
5.8.8 10BASE-T Polarity Correction................................................................ 51
5.9 Monitoring Operations ......................................................................................... 52
5.9.1 Monitoring Auto-Negotiation................................................................... 52
5.9.2 Monitoring Next Page Exchange............................................................ 52
5.9.3 LED Functions........................................................................................ 53
5.9.4 LED Pulse Stretching ............................................................................. 54
5.10 Boundary Scan (JTAG 1149.1) Functions .......................................................... 55
5.10.1 Boundary Scan Interface........................................................................ 55
5.10.2 State Machine ........................................................................................ 55
5.10.3 Instruction Register ................................................................................ 55
5.10.4 Boundary Scan Register ........................................................................ 56
5.10.5 Device ID Register ................................................................................. 56
6.0
Application Information..................................................................................................... 57
6.1 Magnetics Information ......................................................................................... 57
6.2 Typical Twisted-Pair Interface ............................................................................. 57
7.0
Electrical Specifications ................................................................................................... 61
7.1 Electrical Parameters .......................................................................................... 61
7.2 Timing Diagrams ................................................................................................. 65
8.0
Register Definitions - IEEE Base Registers ..................................................................... 75
9.0
Register Definitions - Product-Specific Registers ............................................................ 83
10.0
Intel® LXT972M Transceiver Package Specifications...................................................... 90
10.1 Top Label Markings............................................................................................. 91
11.0
Product Ordering Information ........................................................................................... 92
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Intel® LXT972M Transceiver Block Diagram....................................................... 11
Pin Assignments for Intel® LXT972M Transceiver 48-Pin LQFP Package ......... 12
Management Interface Read Frame Structure ................................................... 27
Management Interface Write Frame Structure ................................................... 27
Initialization Sequence for Intel® LXT972M Transceiver ..................................... 30
Link Establishment Overview) ............................................................................. 34
Clocking for 10BASE-T ...................................................................................... 37
Clocking for 100BASE-X .................................................................................... 37
Clocking for Link Down Clock Transition ............................................................ 38
Intel® LXT972M Transceiver Loopback Paths .................................................... 40
100BASE-X Frame Format ................................................................................ 41
100BASE-TX Data Path ..................................................................................... 42
100BASE-TX Reception with No Errors ............................................................. 43
100BASE-TX Reception with Invalid Symbol ..................................................... 43
100BASE-TX Transmission with No Errors ........................................................ 44
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Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
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