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LX1744CLQ

Dual Output Boost – LED Driver / LCD Bias

Microsemi Corporation 

INTEGRATED PRODUCTS

LX1744

Dual Output Boost – LED Driver / LCD Bias

PRODUCTION DATASHEET

APPLICATION NOTE

FUNCTIONAL DESCRIPTION

The LX1744 is a dual output Pulse Frequency Modulated

(PFM) boost converter that is optimized for large step-up

voltage applications like LCD biasing and LED drive.

Operating in a pseudo-hysteretic mode with a fixed

switch “off time” of 300ns, converter switching is enabled

when the feedback voltage (VFB) falls below the bandgap

reference voltage or the ADJ pin voltage managed by the

reference logic block (see Block Diagram). When this

occurs, the feedback comparator activates the switching

logic, pulling the gate of the power MOSFET high. This in

turn connects the boost inductor to ground causing current

to flow building up the energy stored in the inductor. The

output remains “on”, until the inductor current ramps up to

the peak current level set either by the CS pin programming

resistor (RCS) in the case of the LED driver or by an internal

reference threshold for the LCD bias output. During this

switch cycle, the load is powered from energy stored in the

output capacitor. Once the peak inductor current value is

achieved, the driver output is turned off, for the fixed off-

time period of 300ns, allowing a portion of the energy

stored in the inductor to be delivered to the load causing

output voltage to rise at the input to the feedback circuit. If

the voltage at the feedback pin is less than the internal

reference at the end of the off-time period, the output

switches the power MOSFET “on” and the inductor

charging cycle repeats until the feedback pin voltage is

greater than the internal reference. Typical converter

switching behavior is shown in Figure 12.

LCD BIAS – OUTPUT VOLTAGE PROGRAMMING

Selecting the appropriate values for LCD Bias output

voltage divider (Figure 3), connected to the feedback pin,

programs the output voltage.

VBAT = 1.6V to 6.0V

Using a value between 40kΩ and 75kΩ for R2 works well

in most applications. R1 can be determined by the

following equation (where VREF = 1.19V nominal):

R1

=

R2

VOUT - VREF

VREF

eq. 1

LCD BIAS – OUTPUT VOLTAGE ADJUSTMENT

The LX1744 allows for the dynamic adjustment of the

of the voltage output via an adjustment pin (ADJ). Any

voltage applied to the adjustment pin works in conjunction

with the internal reference logic. The LX1744 will

automatically utilize the internal reference when no signal

is detected or when the adjustment signal voltage is below

approximately 0.6V.

This adjustment pin includes an internal 50pF capacitor

to ground (Figure 4) that works with an external resistor to

create a low-pass filter. This allows a direct PWM (fPWM ≥

100KHz) signal input to be used for the voltage adjustment

signal. (Consequently a DC bias signal can also be used).

LX1744 ADJ

RADJ_1

Reference 50pF 2.5MΩ

Logic

Figure 4 – LCD Bias Adjustment Input

Different PWM signal levels can be accommodated by

selecting a value for RPWM such that the filtered VADJ value

is equal to the reference voltage (eq. 2)

VADJ

=

VPWM

⋅ Duty

Cycle ⋅

⎜⎛

⎜⎝

2.5MΩ

2.5MΩ + RPWM _1

⎟⎞

⎟⎠

eq. 2

LX1744

VOUT

R1

SW

FB

LX1744

ADJ

CADJ

RADJ_1

RADJ_2

R2

Figure 3 – LCD Bias Output Voltage

Figure 5 – LCD Bias Adjustment Input Filter

Ideally the resultant ripple on the ADJ pin should be

approximately 1% or 40dB down from the nominal

reference. When using a PWM with a frequency that is

Copyright © 2000

Rev. 1.1b, 2005-03-01

Microsemi

Integrated Products Division

11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570

Page 7

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