LTM4605 Просмотр технического описания (PDF) - Linear Technology

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LTM4605

High Efficiency Buck-Boost DC/DC uModule

Linear Technology 

LTM4605

APPLICATIONS INFORMATION

Layout Checklist/Example

The high integration of LTM4605 makes the PCB board

layout very simple and easy. However, to optimize its electri-

cal and thermal performance, some layout considerations

are still necessary.

• Use large PCB copper areas for high current path, includ-

ing VIN, RSENSE, SW1, SW2, PGND and VOUT. It helps to

minimize the PCB conduction loss and thermal stress.

• Place high frequency input and output ceramic capaci-

tors next to the VIN, PGND and VOUT pins to minimize

high frequency noise

• Route SENSE– and SENSE+ leads together with minimum

PC trace spacing. Avoid sense lines passing through

noisy areas, such as switch nodes.

• Place a dedicated power ground layer underneath the

unit.

• To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnection

between the top layer and other power layers

• Do not put vias directly on pads, unless the vias are

capped.

• Use a separated SGND ground copper area for com-

ponents connected to signal pins. Connect the SGND

to PGND underneath the unit.

Figure 13. gives a good example of the recommended

layout.

SW1

SW2 VIN

L1

VOUT

COUT

CIN

RSENSE

PGND

+ – SGND

RSENSE

KELVIN CONNECTIONS TO RSENSE

PGND

4605 F13

Figure 13. Recommended PCB Layout

TYPICAL APPLICATIONS

VIN

12V TO 20V

10μF

35V

x2

ON/OFF

R1

1.5k

R3

C3

1k

0.1μF

CLOCK SYNC

PGOOD VIN PLLIN VOUT

RUN

FCB

COMP LTM4605

INTVCC

SW1

PLLFLTR

SW2

EXTVCC

STBYMD

RSENSE

SENSE+

SS

SGND

SENSE–

PGND

VFB

+

L1

3.3μH

R2

8mΩ

RFB

7.15k

100μF

25V

VOUT

12V

12A

4605 TA02

Figure 14. Buck Mode Operation with 12V to 20V Input

20

4605fa

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