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LTC3422 Просмотр технического описания (PDF) - Linear Technology

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LTC3422 Datasheet PDF : 16 Pages
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LTC3422
U
OPERATIO
inrush current limiting are provided during start-up as
well as normal switching mode. The same soft-start
capacitor is used for each operating mode.
When either VIN or VOUT exceeds 2.25V, the LTC3422
enters normal operating mode. Once the output voltage
exceeds the input by 0.3V typical, the LTC3422 powers
itself from VOUT instead of VIN. At this point the internal
circuitry has no dependency on the VIN input voltage,
eliminating the requirement for a large input capacitor.
The input voltage can drop as low as 0.5V without affecting
circuit operation. The limiting factor for the application
becomes the availability of the power source to supply
sufficient energy to the output at the low voltages and the
maximum duty cycle, which is clamped at 91% typical.
LOW NOISE FIXED FREQUENCY OPERATION
Shutdown
The part is shutdown by pulling SHDN below 0.25V, and
activated by pulling the pin initially above 1V. Once VOUT
exceeds 2.2V typical, hysteresis is applied to this pin
allowing it to maintain a logic high state down to 0.65V.
Note that SHDN can be driven above VIN or VOUT as long
as it is limited to less than the absolute maximum rating.
Soft-Start
The soft-start time is programmed with an external capaci-
tor from SS to ground. An internal current source charges
it with a nominal 2.4µA. The ramping voltage on SS
dictates the gradually increasing peak current limit until
the voltage on the capacitor exceeds 1.6V, after which the
internally set peak current limit is maintained. In the event
of a commanded shutdown or a thermal shutdown, the
capacitor on SS is discharged to ground automatically.
Note that Burst Mode operation is inhibited during the
soft-start time.
t (ms) = CSS (µF) • 320
Oscillator
The frequency of operation is set through a resistor from
RT to ground. A precision timing capacitor resides inside
the LTC3422. The oscillator can be synchronized with an
external clock applied to SYNC. When synchronizing the
8
oscillator, the free running frequency must be set at least
20% lower than the desired synchronized frequency.
fOSC
=
28
RT
where fOSC is in MHz and RT is in k.
Current Sensing
Lossless current sensing converts the peak current signal
to a voltage to sum in with the internal slope compensa-
tion. This summed signal is compared to the error ampli-
fier output to provide a peak current control command for
the PWM. The LTC3422 incorporates slope compensation
which is adaptive to the input and output voltages. There-
fore, the converter provides the proper amount of slope
compensation to ensure stability, but not an excess which
would cause a loss of phase margin in the converter.
Error Amplifier
The error amplifier is a transconductance amplifier, with
its positive input internally connected to the 1.216V refer-
ence and its negative input connected to FB. A simple
compensation network is placed from VC to ground.
Internal clamps limit the minimum and maximum error
amplifier output voltage for improved large-signal tran-
sient response.
Current Limit
The current limit circuitry shuts off the internal N-channel
MOSFET switch when the current limit threshold is reached.
In Burst Mode operation, the current limit is reduced to
approximately 600mA.
Zero Current Amplifier
The zero current amplifier monitors the inductor current to
the output and shuts off the synchronous rectifier once the
current falls below 50mA typical, preventing negative
inductor current.
Anti-Ringing Control
The anti-ringing control connects a resistor across the
inductor to dampen the ringing on SW during discontinu-
ous conduction mode. The LCSW ringing (L = inductor,
3422fa

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