LTC1983ES6-3 Просмотр технического описания (PDF) - Linear Technology

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LTC1983ES6-3

100mA Regulated Charge-Pump Inverters in ThinSOT

Linear Technology 

U

OPERATIO (Refer to Block Diagram)

problem in the low IQ mode, it is necessary to switch the

part in and out of shutdown at the minimum allowable

frequency (refer to Figure 3) for a given output load.

General Layout Considerations

Due to the high switching frequency and high transient

currents produced by the LTC1983, careful board layout is

a must. A clean board layout using a ground plane and

short connections to all capacitors will improve perfor-

mance and ensure proper regulation under all conditions

(refer to Figures 4a and 4b). You will not get advertised

performance with careless layout.

LTC1983-3/LTC1983-5

1000

100

SHDN ON PULSE WIDTH = 200µs

COUT = 10µF

10

1

1

10

100

1000

OUTPUT CURRENT (µA)

1983 F03b

Figure 3

VIN: 2.3V TO 5.5V

VOUT

1 VIN

SHDN 6

CIN

2 VOUT

3 C+

GND 5

C– 4

CFLY

COUT

1983 F04a

Figure 4a. Recommended Component

Placement for a Single Layer Board

TOP LAYER

BOTTOM LAYER

VOUT

1 VIN

2 VOUT

3 C+

SHDN 6

GND 5

C– 4

CIN

COUT

CFLY

1983 F04b

Figure 4b. Recommended Component

Placement for a Double Layer Board

1983fa

9

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