LTC1735C Просмотр технического описания (PDF) - Linear Technology

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LTC1735C

High Efficiency Synchronous Step-Down Switching Regulator

Linear Technology 

LTC1735

TYPICAL PERFOR A CE CHARACTERISTICS

VOUT(RIPPLE)

(Burst Mode Operation)

VOUT

20mV/DIV

ILOAD = 1.5A

FIGURE 1

IL

5A/DIV

Load Step (Burst Mode Operation)

FIGURE 1

VOUT

50mV/DIV

Load Step (Continuous Mode)

VOUT

50mV/DIV

FIGURE 1

IL

5A/DIV

IL

5A/DIV

FCB = 5V

VIN = 15V

VOUT = 1.6V

5µs/DIV

Start-Up

VOUT

1V/DIV

VRUN/SS

5V/DIV

IL

5A/DIV

VIN = 15V

VOUT = 1.6V

RLOAD = 0.16Ω

5ms/DIV

1735 G27

10mA TO

9A LOAD STEP

FCB = 5V

VIN = 15V

VOUT = 1.6V

10µs/DIV

1735 G26

0A TO

9A LOAD STEP

FCB = 0V

VIN = 15V

VOUT = 1.6V

10µs/DIV

1735 G25

VOUT(RIPPLE) (Synchronized)

VOUT

10mV/DIV

ILOAD = 10mA

FIGURE 1

VOUT(RIPPLE)

(Burst Mode Operation)

VOUT

20mV/DIV

ILOAD = 50mA

FIGURE 1

1735 G22

IL

5A/DIV

EXT SYNC f = fO

VIN = 15V

VOUT = 1.6V

10µs/DIV

IL

5A/DIV

1735 G23

FCB = 5V

VIN = 15V

VOUT = 1.6V

50µs/DIV

1735 G24

PI FU CTIO S

COSC: External capacitor COSC from this pin to ground sets

the operating frequency.

RUN/SS: Combination of Soft-Start and Run Control In-

puts. A capacitor to ground at this pin sets the ramp time

to full output current. The time is approximately 1.25s/µF.

Forcing this pin below 1.5V causes the device to shut

down. (See Applications Information section for quiescent

current note.) In shutdown all functions, including INTVCC,

are disabled. Latchoff overcurrent protection is also in-

voked via this pin as described in the Applications Infor-

mation section.

ITH: Error Amplifier Compensation Point. The current

comparator threshold increases with this control voltage.

Nominal voltage range for this pin is 0V to 2.4V.

FCB: Forced Continuous/Synchronization Input. Tie this

pin to ground for continuous synchronous operation, to a

resistive divider from the secondary output when using a

secondary winding or to INTVCC to enable Burst Mode

operation at low load currents. Clocking this pin with a

signal above 1.5VP–P disables Burst Mode operation but

allows cycle-skipping at low load currents and synchro-

nizes the internal oscillator with the external clock. The

FCB pin must not be driven when the device is shut down

(RUN/SS pin low).

SGND: Small-Signal Ground. All small-signal components

such as COSC, CSS, the feedback divider plus the loop com-

pensation resistor and capacitor(s) should single-point tie

to this pin. This pin should, in turn, connect to PGND.

1735fc

7

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