LTC1272-3ACSW Просмотр технического описания (PDF) - Linear Technology
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LTC1272-3ACSW Datasheet PDF : 20 Pages
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LTC1272
APPLICATI S I FOR ATIO
CS & RD
BUSY
CLK IN
50ns TYP
CLK OUT
DB11
DB10
DB1
DB0
(MSB)
(LSB)
LTC1272 • TA08
Figure 7. Operating Waveforms Using an External Clock Source for CLK IN
5V
CURVATURE
+
CORRECTED
BANDGAP
REFERENCE
–
LTC1272
TO DAC
AGND
3
VREF
2
0.1µF
10 µF
LTC1272 • TA10
Figure 8. LTC1272 Internal 2.42V Reference
Unipolar Operation
Figure 9 shows the ideal input/output characteristic for the
0V to 5V input range of the LTC1272. The code transitions
occur midway between successive integer LSB values
(i.e., 1/2LSB, 3/2LSBs, 5/2LSBs . . . FS – 3/2LSBs). The
output code is natural binary with 1 LSB = FS/4096 =
(5/4096)V = 1.22mV.
Unipolar Offset and Full-Scale Error Adjustment
In applications where absolute accuracy is important, then
offset and full-scale error can be adjusted to zero. Offset
11...111
11...110
11...101
FULL-SCALE
TRANSITION
00...011
FS = 5V
1LSB = –4–0FS–9–6
00...010
00...001
00...000
01 2 3
FS
LSB LSBs
LSBs
FS – 1LSB
AIN, INPUT VOLTAGE (IN TERMS OF LSBs)
LT1272 • TA11
Figure 9. LTC1272 Ideal Input/Output Transfer Characteristic
error must be adjusted before full-scale error. Figure 10
shows the extra components required for full-scale error
adjustment. Zero offset is achieved by adjusting the offset
of the op amp driving AIN (i.e., A1 in Figure 10). For zero
offset error apply 0.61mV (i.e., 1/2LBS) at VIN and adjust
the op amp offset voltage until the ADC output code
flickers between 0000 0000 0000 and 0000 0000 0001.
For zero full-scale error apply an analog input of 4.99817V
(i.e., FS – 3/2LSBs or last code transition) at VIN and adjust
R1 until the ADC output code flickers between 1111 1111
1110 and 1111 1111 1111.
1272fb
10
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