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LT3971 Просмотр технического описания (PDF) - Linear Technology

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LT3971 Datasheet PDF : 28 Pages
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LT3971/LT3971-3.3/LT3971-5
APPLICATIONS INFORMATION
feedback resistors and a low leakage Schottky catch diode
in applications utilizing the ultralow quiescent current
performance of the LT3971. The feedback resistors should
preferably be on the order of MΩ and the Schottky catch
diode should have less than 1µA of typical reverse leak-
age at room temperature. These two considerations are
reiterated in the FB Resistor Network and Catch Diode
Selection sections.
It is important to note that another way to decrease the
pulse frequency is to increase the magnitude of each
single current pulse. However, this increases the output
voltage ripple because each cycle delivers more power to
the output capacitor. The magnitude of the current pulses
was selected to ensure less than 15mV of output ripple in
a typical application. See Figure 2.
VSW
5V/DIV
IL
500mA/DIV
VOUT
20mV/DIV
VIN = 12V
VOUT = 3.3V
ILOAD = 10mA
5µs/DIV
3971 F02
Figure 2. Burst Mode Operation
While in Burst Mode operation, the burst frequency and
the charge delivered with each pulse will not change with
output capacitance. Therefore, the output voltage ripple
will be inversely proportional to the output capacitance.
In a typical application with a 22μF output capacitor, the
output ripple is about 10mV, and with a 47μF output ca-
pacitor the output ripple is about 5mV. The output voltage
ripple can continue to be decreased by increasing the
output capacitance.
At higher output loads (above 92mA for the front page
application) the LT3971 will be running at the frequency
programmed by the RT resistor, and will be operating in
standard PWM mode. The transition between PWM and low
ripple Burst Mode operation will exhibit slight frequency
jitter, but will not disturb the output voltage.
To ensure proper Burst Mode operation, the SYNC pin
must be grounded. When synchronized with an external
clock, the LT3971 will pulse skip at light loads. The qui-
escent current will significantly increase to 1.5mA in light
load situations when synchronized with an external clock.
Holding the SYNC pin high yields no advantages in terms
of output ripple or minimum load to full frequency, so is
not recommended.
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to:
R1=
R2

VOUT
1.19V
1
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage
accuracy.
The total resistance of the FB resistor divider should be
selected to be as large as possible to enhance low current
performance. The resistor divider generates a small load
on the output, which should be minimized to optimize the
low supply current at light loads.
When using large FB resistors, a 10pF phase lead capacitor
should be connected from VOUT to FB.
The LT3971-3.3 and LT3971-5 contain an internal 10M FB
resistor divider as well as an internal phase lead capacitor.
Setting the Switching Frequency
The LT3971 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2MHz
by using a resistor tied from the RT pin to ground. A table
showing the necessary RT value for a desired switching
frequency is in Table 1.
3971fd
11

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