LQFP100 Просмотр технического описания (PDF) - NXP Semiconductors.
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LQFP100 Datasheet PDF : 69 Pages
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NXP Semiconductors
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
5. Block diagram
P0, P1, P2,
P3, P4
TMS TDI trace signals
TRST TCK TDO
EXTIN0
XTAL1
XTAL2
VDDA
RESET
VDD(3V3)
LPC2364/65/66/67/68
128/256/
8/32 kB 512 kB
SRAM FLASH
TEST/DEBUG
INTERFACE
HIGH-SPEED
GPI/O
70 PINS
TOTAL
INTERNAL
CONTROLLERS
SRAM FLASH
ARM7TDMI-S
PLL
system
clock
SYSTEM
FUNCTIONS
INTERNAL RC
OSCILLATOR
VECTORED
INTERRUPT
CONTROLLER
AHB2
AHB
BRIDGE
AHB
BRIDGE
AHB1
RMII(8)
EINT3 to EINT0
P0, P2
2 × CAP0/CAP1/
CAP2/CAP3
4 × MAT2,
2 × MAT0/MAT1/
MAT3
6 × PWM1
2 × PCAP1
ETHERNET
MAC WITH
DMA
16 kB
SRAM
MASTER AHB TO SLAVE
PORT AHB BRIDGE PORT
AHB TO
APB BRIDGE
EXTERNAL INTERRUPTS
CAPTURE/COMPARE
TIMER0/TIMER1/
TIMER2/TIMER3
PWM1
8 kB
SRAM
USB WITH
4 kB RAM
AND DMA(2)
GP DMA
CONTROLLER
I2S INTERFACE
SPI, SSP0 INTERFACE
P0, P1
LEGACY GPI/O
52 PINS TOTAL
SSP1 INTERFACE
6 × AD0
A/D CONVERTER
AOUT
D/A CONVERTER
VBAT
ppoowweerr ddoommaaiinn 22
RTCX1
RTCX2
2 kB BATTERY RAM
RTC
OSCILLATOR
REAL-
TIME
CLOCK
WATCHDOG TIMER
SD/MMC CARD
INTERFACE(1)
UART0, UART2, UART3
UART1
CAN1, CAN2(2)
SYSTEM CONTROL
I2C0, I2C1, I2C2
VREF
VSSA, VSS
VDD(DCDC)(3V3)
VBUS
USB_D+, USB_D−
USB_CONNECT
USB_UP_LED
I2SRX_CLK
I2STX_CLK
I2SRX_WS
I2STX_WS
I2SRX_SDA
I2STX_SDA
SCK, SCK0
MOSI, MOSI0
MISO, MISO0
SSEL, SSEL0
SCK1
MOSI1
MISO1
SSEL1
MCICLK, MCIPWR
MCICMD,
MCIDAT[3:0]
TXD0, TXD2, TXD3
RXD0, RXD2, RXD3
TXD1
RXD1
DTR1, RTS1
DSR1, CTS1, DCD1,
RI1
RD1, RD2
TD1, TD2
SCL0, SCL1, SCL2
SDA0, SDA1, SDA2
(1) LPC2367/68 only.
(2) LPC2364/66/68 only.
Fig 1. LPC2364/65/66/67/68 block diagram
002aac566
LPC2364_65_66_67_68
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7.1 — 16 October 2013
© NXP B.V. 2013. All rights reserved.
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