LPC2144FBD64(2007) Просмотр технического описания (PDF) - NXP Semiconductors.

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LPC2144FBD64
(Rev.:2007)

Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC

NXP Semiconductors. 

NXP Semiconductors

LPC2141/42/44/46/48

Single-chip 16-bit/32-bit microcontrollers

Table 3. Pin description …continued

Symbol

Pin

Type

P1.28/TDI

60[6]

I/O

I

P1.29/TCK

56[6]

I/O

I

P1.30/TMS

52[6]

I/O

I

P1.31/TRST 20[6]

I/O

I

D+

10[7]

I/O

D−

11[7]

I/O

RESET

57[8]

I

XTAL1

XTAL2

RTCX1

RTCX2

VSS

VSSA

VDD

VDDA

62[9]

I

61[9]

O

3[9]

I

5[9]

O

6, 18, 25, 42, I

50

59

I

23, 43, 51 I

7

I

VREF

63

I

VBAT

49

I

Description

P1.28 — General purpose input/output digital pin (GPIO)

TDI — Test Data in for JTAG interface

P1.29 — General purpose input/output digital pin (GPIO)

TCK — Test Clock for JTAG interface

P1.30 — General purpose input/output digital pin (GPIO)

TMS — Test Mode Select for JTAG interface

P1.31 — General purpose input/output digital pin (GPIO)

TRST — Test Reset for JTAG interface

USB bidirectional D+ line

USB bidirectional D− line

External reset input: A LOW on this pin resets the device, causing I/O ports

and peripherals to take on their default states, and processor execution to

begin at address 0, TTL with hysteresis, 5 V tolerant

Input to the oscillator circuit and internal clock generator circuits

Output from the oscillator amplifier

Input to the RTC oscillator circuit

Output from the RTC oscillator circuit

Ground: 0 V reference

Analog ground: 0 V reference, this should nominally be the same voltage as

VSS, but should be isolated to minimize noise and error

3.3 V power supply: This is the power supply voltage for the core and I/O

ports

Analog 3.3 V power supply: This should be nominally the same voltage as

VDD but should be isolated to minimize noise and error, this voltage is only

used to power the on-chip ADC(s) and DAC

ADC reference voltage: This should be nominally less than or equal to the

VDD voltage but should be isolated to minimize noise and error, level on this

pin is used as a reference for ADC(s) and DAC

RTC power supply voltage: 3.3 V on this pin supplies the power to the RTC

[1] 5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.

[2] 5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. If configured for an input

function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns.

[3] Open-drain 5 V tolerant digital I/O I2C-bus 400 kHz specification compatible pad. It requires external pull-up to provide an output

functionality.

[4] 5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog input function. If configured

for an input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns. When configured as an ADC input, digital

section of the pad is disabled.

[5] 5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog output function. When

configured as the DAC output, digital section of the pad is disabled.

[6] 5 V tolerant pad with built-in pull-up resistor providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.

The pull-up resistor’s value typically ranges from 60 kΩ to 300 kΩ.

[7] Pad is designed in accordance with the Universal Serial Bus (USB) specification, revision 2.0 (Full-speed and Low-speed mode only).

[8] 5 V tolerant pad providing digital input (with TTL levels and hysteresis) function only.

[9] Pad provides special analog functionality.

LPC2141_42_44_46_48_3

Product data sheet

Rev. 03 — 19 October 2007

© NXP B.V. 2007. All rights reserved.

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