LH52258AK-20 Просмотр технического описания (PDF) - Sharp Electronics

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LH52258AK-20

CMOS 32K × 8 Static RAM

Sharp Electronics 

LH52258A

AC TEST CONDITIONS

PARAMETER

Input Pulse Levels

Input Rise and Fall Times

Input and Output Timing Ref. Levels

Output Load, Timing Tests

RATING

VSS to 3 V

3 ns

1.5 V

Figure 3

CAPACITANCE 1,2

PARAMETER

RATING

CIN (Input Capacitance)

7 pF

CDQ (I/O Capacitance)

8 pF

NOTES:

1. Capacitances are maximum values at 25oC measured at 1.0 MHz

with VBias = 0 V and VCC = 5.0 V.

2. Guaranteed but not tested.

DATA RETENTION TIMING

E must be held above the lesser of VIH or VCC – 0.2 V

to prevent improper operation when VCC < 4.5 V. E must

be VCC – 0.2 V or greater to meet IDR specification. All

other inputs are ‘Don’t Care.’

CMOS 32K × 8 Static RAM

+5 V

DQ PINS

480 Ω

255 Ω

30 pF *

* INCLUDES JIG AND SCOPE CAPACITANCES

52258A-3

Figure 3. Output Load Circuit

VCC

E

4.5 V

VIH

VDR

VIL

0 ns

tRC MIN

E ≥ VDR - 0.2 V

Figure 4. Data Retention Timing

52258A-4

4

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