LH521028 Просмотр технического описания (PDF) - Sharp Electronics
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LH521028 Datasheet PDF : 15 Pages
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CMOS 64K × 18 Static RAM
LH521028
AC ELECTRICAL CHARACTERISTICS 1 (Over Operating Range)
SYMBOL
DESCRIPTION
–17
MIN MAX
–20
MIN MAX
–25
MIN MAX
–35
UNITS
MIN MAX
READ CYCLE
tRC
tAA
tASL
tAHL
tLEA
tLHM
tOH
tLH
tEA
tELZ
tEHZ
tSA
tSLZ
tSHZ
tGA
tGLZ
tGHZ
tRCS
tRCH
tPU
tPD
tWA
Read Cycle Timing
17
20
25
35
ns
Address Access Time
17
20
25
35
ns
Address Setup to Latch Enable
3
3
3
3
ns
Address Hold from Latch Enable
4
5
6
6
ns
Latch Enable to Data Valid
19
22
27
37
ns
Latch Enable High Pulse Width
5
5
6
6
ns
Output Hold from Address Change
3
5
5
5
ns
Output Hold from Latch High
4
7
7
7
ns
E Low to Valid Data
E Low to Output Active 2,3
E High to Output High-Z 2,3
17
20
25
35
ns
3
3
3
3
ns
10
10
12
20
ns
S Low to Valid Data
S Low to Output Active 2,3
S High to Output High-Z 2,3
9
10
12
20
ns
2
2
3
3
ns
10
10
12
20
ns
G Low to Valid Data
G Low to Output Active 2,3
G High to Output High-Z 2,3
8
9
12
20
ns
0
0
0
0
ns
8
8
10
20
ns
Read Setup from W High
0
0
0
0
ns
Read Hold from W Low
E LOW to Power Up Time 3
E HIGH to Power Down Time 3
0
0
0
0
ns
0
0
0
0
ns
17
20
25
35
ns
Access Time From Write Enable HIGH
20
25
28
35
ns
WRITE CYCLE
tWC
tEW
tSW
tAW
tAS
tAH
tASL
tAHL
tLHW
tLHM
tWP
tDW
tDH
tWHZ
tWLZ
Write Cycle Time
E Low to End of Write
S LOW to End of Write
Address Valid to End of Write
Address Setup to Start of Write
Address Hold from End of Write
Address Setup to Latch Enable
Address Hold from Latch Enable
Latch Hold from W High
Latch Enable HIGH Pulse Width
W Pulse Width
Input Data Setup Time
Input Data Hold Time
W Low to Output High-Z 2,3
W High to Output Active 2,3
17
20
25
35
ns
13
15
20
30
ns
13
15
20
30
ns
13
15
20
30
ns
0
0
0
0
ns
0
0
0
0
ns
3
3
3
3
ns
4
5
6
6
ns
0
0
0
0
ns
5
5
6
6
ns
13
15
20
30
ns
9
12
13
15
ns
0
0
0
0
ns
8
8
10
14
ns
3
3
3
3
ns
NOTES:
1. AC Electrical Characteristics specified at ‘AC Test Conditions’ levels.
2. Active output to High-Z and High-Z to output active tests specified for a ±500 mV transition from steady state levels into the test load.
CLoad = 5 pF.
3. Guaranteed but not tested.
4-217
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