LD7550 Просмотр технического описания (PDF) - Unspecified

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LD7550

Green-Mode PWM Controller

Unspecified 

LD7550

Vin

Cbulk

R1

D1

C1

VCC

OUT

LD7550

Comp

CS

GND

Rs

Fig. 8

A 250nS leading-edge blanking time is included in the input

of CS pin to prevent the false-trigger caused by the current

spike and further to eliminate the need of R-C filter which is

usually needed in the typical UC384X application (Fig. 9).

Oscillator and Switching Frequency

Connecting a resistor from RT pin to GND according to the

equation can program the normal switching frequency:

fSW

=

66.5

RT(KΩ )

× 100(KHz)

The suggested operating frequency range of LD7550 is

within 50KHz to 130KHz.

Voltage Feedback Loop

The voltage feedback signal is provided from the TL431 in

the secondary side through the photo-coupler to the COMP

pin of LD7550. The input stage of LD7550, like the

UC384X, is with 2 diodes voltage offset then feeding into the

voltage divider with 1/3 ratio, that is,

V+ (PWM COMPARATOR

)

=

1

3

× (VCOMP

−

2VF )

A pull-high resistor is embedded internally thus can be

eliminated on the external circuit.

VCC

OUT

LD7550

CS

GND

250ns

blanking

time

remove

Fig. 9

Output Stage and Maximum Duty-Cycle

An output stage of a CMOS buffer, with typical 300mA

driving capability, is incorporated to drive a power MOSFET

directly. And the maximum duty-cycle of LD7550 is limited

to 75% to avoid the transformer saturation.

Internal Slope Compensation

A fundamental issue of current mode control is the stability

problem when its duty-cycle is operated more than 50%. To

stabilize the control loop, the slope compensation is needed

in the traditional UC384X design by injecting the ramp signal

from the RT/CT pin through a coupling capacitor. In LD7550,

the internal slope compensation circuit has been

implemented to simplify the external circuit design.

On/Off Control

The LD7550 can be controlled to turn off by pulling COMP

pin to lower than 1.2V. The gate output pin of LD7550 will

be disabled immediately under such condition. The off mode

can be released when the pull-low signal is removed.

Dual-Oscillator Green-Mode Operation

There are many difference topologies has been

implemented in different chips for the green-mode or power

saving requirements such as “burst-mode control”,

“skipping-cycle Mode”, “variable off-time control “…etc. The

basic operation theory of all these approaches intended to

7

Leadtrend Technology Corporation

LD7550-DS-00 August 2004

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