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LD7550 Просмотр технического описания (PDF) - Unspecified

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Компоненты Описание
производитель
LD7550
ETC
Unspecified ETC
LD7550 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
LD7550
Application Information
Operation Overview
As long as the green power requirement becomes a trend
and the power saving is getting more and more important for
the switching power supplies and switching adaptors, the
traditional PWM controllers are not able to support such new
requirements. Furthermore, the cost and size limitation force
the PWM controllers need to be powerful to integrate more
functions to reduce the external part counts. The LD7550
is targeted on such application to provide an easy and cost
effective solution; its detail features are described as below:
Under Voltage Lockout (UVLO)
An UVLO comparator is implemented to detect the voltage
on the Vcc pin to ensure the supply voltage is enough to
power on the LD7550 PWM controller and further to drive
the power MOSFET. As shown in Fig. 6, a hysteresis is
implemented to prevent the shutdown from the voltage dip
during startup. The turn-on and turn-off threshold level are
set at 16V and 11.4V, respectively.
Vcc
UVLO(on)
UVLO(off)
I(Vcc)
t
operating current
(~ mA)
deliver the gate drive signal, the supply current is provided
from the auxiliary winding of the transformer. The lower
startup current requirement on the PWM controller will help
to increase the R1 value and then reduce the power
consumption on R1. By using CMOS process and the
special circuit design, the maximum startup current of
LD7550 is only 25µA.
Theoretically, R1 can be very high resistance value.
However, higher R1 will cause longer startup time. By
properly select the value of R1 and C1; it can be optimized
under the consideration of R1 power consumption and the
startup time.
AC
input
EMI
Filter
Cbulk
R1
D1
C1
VCC
OUT
LD7550
CS
GND
Fig. 7
startup current
(~uA)
t
Fig. 6
Startup Current and Startup Circuit
The typical startup circuit to power up the LD7550 is shown
in Fig. 7. During the startup transient, the Vcc is lower than
the UVLO threshold thus there is no gate pulse generated
from LD7550 to drive power MOSFET. Therefore, the
current through R1 is to provide the startup current as well
as charge the capacitor C1. Whenever the Vcc voltage is
higher enough to power on the LD7550 and further to
Current Sensing and Leading-edge Blanking
The typical current mode PWM controller feedbacks both
current signal and voltage signal to close the control loop
and achieve regulation. As shown in Fig. 8, the LD7550
detects the primary MOSFET current from the CS pin, which
is not only for the peak current mode control but also for the
pulse-by-pulse current limit. The maximum voltage
threshold of the current sensing pin is set as 0.85V. Thus
the MOSFET peak current can be calculated as:
IPEAK(MAX)
=
0.85V
RS
6
Leadtrend Technology Corporation
LD7550-DS-00 August 2004

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