LC78625 Просмотр технического описания (PDF) - SANYO -> Panasonic

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Компоненты Описание

производитель

LC78625

Compact Disc Player DSP

SANYO -> Panasonic 

LC78625E

Pin Functions

Pin No.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

Symbol

DEFI

TAI

PDO

VVSS

ISET

VVDD

FR

VSS

EFMO

EFMO

EFMIN

TEST2

CLV+

CLV–

15

V/P

16 FOCS

17

FST

18

FZD

19

HFL

20

TES

21

PCK

22 FSEQ

23

TOFF

24

TGL

25

THLD

26 TEST3

27

VDD

28

JP+

29

JP–

30 DEMO

31 TEST4

32 EMPH

33 LRCKO

34 DFORO

35 DFOLO

36 DACKO

37 TST10

I/O

Function

I Defect detection signal (DEF) input (This pin must be connected to 0 V if unused.)

I

Test input. A pull-down resistor is built in. (This pin must be connected to 0 V in normal operation.)

O

External VCO control phase comparator output

PLL pins

AI

AI

Internal VCO ground. (This pin must be connected to 0 V.)

PDO output current adjustment resistor connection

Internal VCO power supply.

VCO frequency range adjustment

Digital system ground. (This pin must be connected to 0 V.)

O

EFM signal inverted output

O Slice level control

EFM signal output

I

EFM signal input

I Test input. A pull-down resistor is built in. This pin must be connected to 0 V in normal operation.

O Spindle servo control output. Acceleration when CLV+ is high, deceleration when CLV- is high.

O Three-value output is also possible when specified by microprocessor command.

Rough servo/phase control automatic switching monitor output. Outputs a high level during rough servo and a low level during

O phase control.

O Focus servo on/off output. Focus servo is on when the output is low.

O Focus start pulse output. This is an open-drain output.

I Focus error zero cross signal input. (This pin must be connected to 0 V if unused.)

I Track detection signal input. This is a Schmitt input.

I Tracking error signal input. This is a Schmitt input.

O EFM data playback clock monitor. Outputs 4.3218 MHz when the phase is locked.

Synchronization signal detection output. Outputs a high level when the synchronization signal detected from the EFM signal and

O the internally generated synchronization signal agree.

O Tracking off output

O Tracking gain switching output. Increase the gain when low.

O Tracking hold output

I Test input. A pull-down resistor is built in. (This pin must be connected to 0 V.)

Digital system power supply.

Track jump output. A high level output from JP+ indicates acceleration during an outward jump or deceleration during an inward

O jump.

A high level output from JP- indicates acceleration during an inward jump or deceleration during an outward jump.

O Three-value output is also possible when specified by microprocessor command.

I Sound output function input used for end product adjustment manufacturing steps. A pull-down resistor is built in. (This pin must

be connected to 0 V.)

I Test input. A pull-down resistor is built in. (This pin must be connected to 0 V.)

O De-emphasis monitor pin. A high level indicates playback of a de-emphasis disk.

O

Word clock output

O

Digital filter outputs

O

O

Right channel data output

Left channel data output

Bit clock output

O Test output. Leave open. (Normally outputs a low level.)

Continued on next page.

No. 5502-8/35

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