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LC78625 Просмотр технического описания (PDF) - SANYO -> Panasonic

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Компоненты Описание
производитель
LC78625
SANYO
SANYO -> Panasonic SANYO
LC78625 Datasheet PDF : 35 Pages
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LC78625E
• Internal brake modes
Code
$C5
$C4
$A3
$CB
$CA
$CD
$CC
COMMAND
Internal brake on
Internal brake off
Internal brake CONT
Internal brake continuous mode
Reset continuous mode
TON mode during internal braking
Reset TON mode
RES = L
q
q
q
— Issuing the internal brake on command ($C5) sets the LC78625E to internal brake mode. In this mode, the disc
deceleration state can be monitored from the WRQ pin when a brake command ($06) is executed.
— In this mode the disc deceleration state is determined by counting the EFM signal density in a single frame, and
when the EFM signal count falls under four, the CLV– pin is dropped to low. At the same time the WRQ signal,
which functions as a brake completion monitor, goes high. When the microprocessor detects a high level on the
WRQ signal, it should issue a STOP command to fully stop the disc. In internal brake continuous mode, the CLV–
pin high-level output braking operation continues even after the WRQ brake completion monitor goes high.
Note that if errors occur in deceleration state determination due to noise in the EFM signal, the problem can be
rectified by changing the EFM signal count from four to eight with the internal brake control command ($A3).
— In internal braking TON mode, the TOFF pin is held low during internal brake operations. We recommend using
this feature, since it is effective at preventing incorrect detection at the disc mirror surface.
Note:
If focus is lost during the execution of an internal brake command, the pickup must first be refocussed and then the internal brake command must
be reissued.
Since incorrect deceleration state determination is possible depending on the EFM signal playback state (e.g., disc defects, access in progress), we
recommend using these functions in combination with a microprocessor.
8. Track jump circuit; Pin 19: HFL, pin 20: TES, pin 23: TOFF, pin 24: TGL, pin 25: THLD, pin 28: JP+, pin 29: JP–
• The LC78625E supports the two track count modes listed below.
Code
$22
$23
COMMAND
New track count mode (using the TES/HFL combination)
Previous track count mode (directly counts the TES signal)
RES = L
q
The earlier track count function uses the TES signal directly as the internal track counter clock.
To reduce counting errors resulting from noise on the rising and falling edges of the TES signal, the new track count
function prevents noise induced errors by using the combination of the TES and HFL signals, and implements a more
reliable track count function. However, dirt and scratches on the disc can result in HFL signal dropouts that may result
in missing track count pulses. Thus care is required when using this function.
No. 5502-16/35

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