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L6910G Просмотр технического описания (PDF) - STMicroelectronics

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L6910G Datasheet PDF : 26 Pages
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L6910G
Figure 10. Compensation Network
VIN
VOSC
L
VOUT
PWM
COMPARATOR
C18
ESR
COUT
C19
R5
R3
C20
R4
VCOMP
-EAREF
D03IN1512
+
The compensation network consists in the internal error amplifier and the impedance networks ZIN (R3, R4 and
C20) and ZFB (R5, C18 and C19). The compensation network has to provide a closed loop transfer function with
the highest 0dB crossing frequency to have fast response (but always lower than fsw/10) and the highest gain
in DC conditions to minimize the load regulation.
A stable control loop has a gain crossing with -20dB/decade slope and a phase margin greater than 45°. Include
worst-case component variations when determining phase margin.
To locate poles and zeroes of the compensation networks, the following suggestions may be used:
Modulator singularity frequencies:
ωLC
=
-------------1--------------
L COUT
ωESR
=
----------------1----------------
ESR COUT
Compensation network singularity frequency:
ωP1
=
-----------------------1------------------------
R5
C-C----1-1---8-8----+---C-C----1-1---99--
ωZ1
=
-----------1------------
R5 C19
ωP2 = R-----4------1--C-----2---0--
ωZ2 = (---R-----3-----+----R----1-4----)-------C----2----0-
– Put the gain R5/R3 in order to obtain the desired converter bandwidth;
– Place ωZ1 before the output filter resonance ωLC;
– Place ωZ2 at the output filter resonance ωLC;
– Place ωP1 at the output capacitor ESR zero ωESR;
– Place ωP2 at one half of the switching frequency;
– Check the loop gain considering the error amplifier open loop gain.
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