MAX189AEWE(2012) Просмотр технического описания (PDF) - Maxim Integrated
Номер в каталоге
Компоненты Описание
производитель
MAX189AEWE Datasheet PDF : 18 Pages
| |||
MAX187/ MAX189
+5V, Low-Power, 12-Bit Serial ADCs
4.7µF
0.1µF
+5V
ANALOG INPUT
0 TO +5V
SHUTDOWN
INPUT
ON
OFF
4.7µF
1 VDD
SCLK 8
2
MAX187
AIN
CS
7
3 SHDN
4 REF
DOUT 6
GND 5
SERIAL
INTERFACE
4.7µF
0.1µF
+5V
ANALOG INPUT
0 TO +5V
SHUTDOWN
INPUT
ON
OFF
REFERENCE
INPUT
0.1µF
1 VDD
SCLK 8
2
MAX189
AIN
CS
7
3 SHDN
DOUT 6
4 REF
GND 5
SERIAL
INTERFACE
Figure 3a. MAX187 Operational Diagram
AIN
CPACKAGE
GND
12-BIT CAPACITIVE DAC
REF
CHOLD
TRACK INPUT 16pF
-+
HOLD
CSWITCH
TRACK
COMPARATOR
ZERO
RIN
5kI
HOLD
AT THE SAMPLING INSTANT,
THE INPUT SWITCHES FROM
AIN TO GND.
Figure 4. Equivalent Input Circuit
Track / Hold
In track mode, the analog signal is acquired and stored
in the internal hold capacitor. In hold mode, the T/H
switch opens and maintains a constant input to the
ADC’s SAR section.
During acquisition, the analog input AIN charges capaci-
tor CHOLD. Bringing CS low ends the acquisition interval.
At this instant, the T/H switches the input side of CHOLD
to GND. The retained charge on CHOLD represents a
sample of the input, unbalancing the node ZERO at the
comparator’s input.
In hold mode, the capacitive DAC adjusts during the
remainder of the conversion cycle to restore node ZERO
Figure 3b. MAX189 Operational Diagram
to 0V within the limits of a 12-bit resolution. This action
is equivalent to transferring a charge from CHOLD to the
binary-weighted capacitive DAC, which in turn forms a
digital representation of the analog input signal. At the
conversion’s end, the input side of CHOLD switches back
to AIN, and CHOLD charges to the input signal again.
The time required for the T/H to acquire an input sig-
nal is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens and more time must be
allowed between conversions. Acquisition time is calcu-
lated by:
tACQ = 9 (RS + RIN) 16pF
where RIN = 5kI, RS = the source impedance of the
input signal, and tACQ is never less than 1.5Fs. Source
impedances below 5kI do not significantly affect the AC
performance of the ADC.
Input Bandwidth
The ADCs’ input tracking circuitry has a 4.5MHz small-
signal bandwidth, and an 8V/Fs slew rate. It is possible
to digitize high-speed transient events and measure
periodic signals with bandwidths exceeding the ADC’s
sampling rate by using undersampling techniques. To
avoid aliasing of unwanted high-frequency signals into
the frequency band of interest, an anti-alias filter is rec-
ommended. See the MAX274/MAX275 continuous-time
filters data sheet.
Maxim Integrated
8
Share Link: 