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SAA7385GP Просмотр технического описания (PDF) - Philips Electronics

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SAA7385GP Datasheet PDF : 64 Pages
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Philips Semiconductors
Error correction and host interface IC for
CD-ROM (SEQUOIA)
Preliminary specification
SAA7385
SYMBOL PIN I/O
RXS2B
93
I
TXS2B
94
O
TRAYIN
95 I/O
TRAYOUT
96 I/O
SCSIRST
97
I
POR
98
I
VDD6
99
UC_PORT1.7 100 I/O
RAB_MUSB 101 I/O
NRST_SEQ 102 I/O
UC_PORT1.4 103 I/O
UC_PORT1.3 104 I/O
UC_PORT1.1 105 I/O
HOMESW
106 I/O
PLAY
107
I
UC_PORT1.6 108 I/O
VSS13
GPI1
109
110
I
GPI2
111
I
KILL
112
I
TXICE
113 O
RXICE
114
I
RXSUB
VDD7
OSCIN
115
I
116
117
I
VSS14
CLAB
118
119
I
VSS15
DAAB
120
121
I
WSAB
122
I
EFAB
123
I
CLK34
124 O
TEST
125
I
VSS16
DA0
126
127 O
DA1
128 O
PAD
Schmitt, PU25
4 mA
4 mA, PD25
4 mA, PD25
Schmitt
CMOS
CMOS 2, PU25
CMOS 2, PU25
CMOS 2, PU25
CMOS 2, PU25
CMOS 2, PU25
CMOS 2, PU25
2 mA, PU25
Schmitt
CMOS 2, PU25
Schmitt, PU25
Schmitt, PU25
Schmitt, PU25
4 mA
Schmitt, PU25
Schmitt, PU25
standard
Schmitt
Schmitt
Schmitt
Schmitt
2 mA
Schmitt, PD25
S4
S4
DESCRIPTION
S2B interface receive
S2B interface transmit
tray extend control; active LOW (general purpose signal)
tray retract control; active LOW (general purpose signal)
SCSI reset, active LOW; also causes a system reset
power-on reset; active LOW
power supply 6
drive speed select; microcontroller port 1.7
RD/WR, acknowledge; microcontroller port 1.2
reset to engine; microcontroller port 1.5
general purpose microcontroller I/O port; port 1.4
general purpose microcontroller I/O port; port 1.3
general purpose microcontroller I/O port; port 1.1
actuator sled home; active LOW; microcontroller port 1.0
laser on and focused status; active LOW; RDSW(4)
general purpose microcontroller I/O port; port 1.6
ground 13
general purpose input; microcontroller port 3.4
general purpose input; microcontroller port 3.5
shut off audio; active LOW
debug UART output; from 80C32 serial port
debug UART input; to 80C32 serial port
sub-code input
power supply 7
master input clock; 34 or 16 MHz
ground 14
clock
ground 15
data
word strobe
error flag
34 MHz output clock
test pin; must be ground
ground 16
DRAM address bus; bit DA0
DRAM address bus; bit DA1
1996 Jun 19
8

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