KM416C256DLJ Просмотр технического описания (PDF) - Samsung
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KM416C256DLJ Datasheet PDF : 8 Pages
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KM416C256D, KM416V256D
CMOS DRAM
CAPACITANCE (TA=25¡É, VCC=5V or 3.3V, f=1MHz)
Parameter
Symbol
Min
Input capacitance [A0 ~ A8]
CIN1
-
Input capacitance [RAS, UCAS, LCAS, W, OE]
CIN2
-
Output capacitance [DQ0 - DQ15]
CDQ
-
AC CHARACTERISTICS (0¡É¡ÂTA¡Â70¡É, See note 1,2)
Test condition (5V device) : VCC=5.0V¡¾10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.4/0.4V
Test condition (3.3V device) : VCC=3.3V¡¾0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
Random read or write cycle time
tRC
Read-modify-write cycle time
tRWC
Access time from RAS
tRAC
Access time from CAS
tCAC
Access time from column address
tAA
CAS to output in Low-Z
tCLZ
Output buffer turn-off delay
tOFF
Transition time (rise and fall)
tT
RAS precharge time
tRP
RAS pulse width
tRAS
RAS hold time
tRSH
CAS hold time
tCSH
CAS pulse width
tCAS
RAS to CAS delay time
tRCD
RAS to column address delay time
tRAD
CAS to RAS precharge time
tCRP
Row address set-up time
tASR
Row address hold time
tRAH
Column address set-up time
tASC
Column address hold time
tCAH
Column address to RAS lead time
tRAL
Read command set-up time
tRCS
Read command hold time referenced to CAS tRCH
Read command hold time referenced to RAS tRRH
Write command set-up time
tWCS
Write command hold time
tWCH
Write command pulse width
tWP
Write command to RAS lead time
tRWL
Write command to CAS lead time
tCWL
-5 *1
Min Max
90
132
50
15
25
0
0
12
3
50
30
50
10K
15
50
15
10K
20
35
15
25
5
0
10
0
10
25
0
0
0
0
10
10
15
13
-6
Min Max
110
152
60
15
30
0
0
12
3
50
40
60
10K
15
60
15
10K
20
45
15
30
5
0
10
0
10
30
0
0
0
0
10
10
15
15
Note) *1 : 5V only
Max
5
7
7
Units
pF
pF
pF
-7
Min Max
130
177
70
20
35
0
0
17
3
50
50
70
10K
20
70
20
10K
20
50
15
35
5
0
10
0
15
35
0
0
0
0
15
15
15
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
3,4,10
3,4,5
3,10
3
6
2
4
10
12
12
8
8
7
15
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