ISPLSI5512VA Просмотр технического описания (PDF) - Lattice Semiconductor

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производитель

ISPLSI5512VA

In-System Programmable 3.3V SuperWIDE™ High Density PLD

Lattice Semiconductor 

Specifications ispLSI 5512VA

Functional Block Diagram

Figure 1. ispLSI 5512VA Functional Block Diagram (388 BGA Option)

VCCIO

1I/O 0 / TOE

I/O 1

I/O 2

I/O 3

I/O 14

I/O 15

I/O 16

I/O 17

I/O 18

I/O 19

I/O 20

I/O 21

I/O 32

I/O 33

I/O 34

I/O 35

I/O 36

I/O 37

I/O 38

I/O 39

I/O 50

I/O 51

I/O 52

I/O 53

I/O 54

I/O 55

I/O 56

I/O 57

I/O 68

I/O 69

I/O 70

I/O 71

Input Bus

Generic

Logic Block

Input Bus

Generic

Logic Block

Input Bus

Generic

Logic Block

Global Routing Pool

(GRP)

GSET/GRST

Generic

Logic Block

Input Bus

Generic

Logic Block

Input Bus

Generic

Logic Block

Input Bus

1. CLK2, CLK3 and TOE signals are multiplexed with I/O signals. Which I/O is multiplexed is

determined by the package type used – see table below.

Package Type

388 BGA

272 BGA

208 PQFP

Multiplexed Signals

I/O 179 / CLK2 I/O 197 / CLK3 I/O 0 / TOE

I/O 119 / CLK2 I/O 131 / CLK 3 I/O 0 / TOE

I/O 89 / CLK2 I/O 98 / CLK 3 I/O 0 / TOE

Input Bus

Generic

Logic Block

Generic

Logic Block

Input Bus

Boundary

Scan

Interface

TDI

TDO

I/O 215

I/O 214

I/O 213

I/O 212

I/O 201

I/O 200

I/O 199

I/O 198

I/O 197/CLK3

I/O 196

I/O 195

I/O 194

I/O 183

I/O 182

I/O 181

I/O 180

I/O 179/CLK2

I/O 178

I/O 177

I/O 176

I/O 165

I/O 164

I/O 163

I/O 162

I/O 161

I/O 160

I/O 159

I/O 158

I/O 147

I/O 146

I/O 145

I/O 144

2

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