ISP1583 Просмотр технического описания (PDF) - Philips Electronics

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ISP1583

Hi-Speed Universal Serial Bus peripheral controller

Philips Electronics 

Philips Semiconductors

ISP1583

Hi-Speed USB peripheral controller

Table 2: Pin description…continued

Symbol[1] Pin Type[2] Description

AD6

30 I/O bit 6 of multiplexed address and data bus

bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant[6]

AD7

31 I/O bit 7 of multiplexed address and data bus

bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant[6]

VCC(1V8)[3]

32 -

voltage regulator output (1.8 V ± 0.15 V); tapped out voltage

from the internal regulator; this regulated voltage cannot drive

external devices; decouple this pin using a 0.1 µF capacitor;

see Section 8.15

n.c.

33 -

not connected

MODE1

34 I

mode selection input 1; used in split bus mode only:

• LOW: ALE function (address latch enable)

• HIGH: A0 function (address/data indicator).

Remark: When operating in generic processor mode, set pin

MODE1 HIGH.

input pad; TTL; 5 V tolerant[6]

DGND

35 -

digital ground

ALE/A0

36 I

Address latch enable input — When pin MODE1 = LOW

during power-up, a falling edge latches the address on the

multiplexed address and data bus AD[7:0].

Address and data selection input — When pin

MODE1 = HIGH during power-up, the function is determined

by the level on this pin (detected on the rising edge of the

WR_N pulse):

• HIGH: bus AD[7:0] is a register address

• LOW: bus AD[7:0] is register data; used in split bus mode

only.

Remark: When operating in generic processor mode with pin

MODE1 = HIGH, this pin must be pulled down using a 10 kΩ

resistor.

input pad; TTL; 5 V tolerant[6]

DATA0

37 I/O

bit 0 of bidirectional data bus

bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant[6]

DATA1

38 I/O

bit 1 of bidirectional data bus

bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant[6]

DATA2

39 I/O

bit 2 of bidirectional data bus

bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant[6]

DATA3

40 I/O

bit 3 of bidirectional data bus

bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant[6]

VCC(I/O)[3]

DATA4

41 -

42 I/O

I/O pad supply voltage (1.65 V to 3.6 V); see Section 8.15

bit 4 of bidirectional data bus

bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant[6]

DATA5

43 I/O

bit 5 of bidirectional data bus

bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant[6]

9397 750 13461

Product data

Rev. 03 — 12 July 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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