ISL6420(2004_02) Просмотр технического описания (PDF) - Intersil

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производитель

ISL6420
(Rev.:2004_02)

Advanced Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

Intersil 

ISL6420

VMSET/MODE - This pin is a dual function pin. Tie this pin to

VCC5 to disable voltage margining. When not tied to VCC5,

this pin serves as VMSET. Connect a resistor from this pin to

ground to set delta for voltage margining. If voltage

margining and external reference tracking mode are not

needed, this pin can be tied directly to ground.

GPIO2 - This is general purpose IO pin for voltage

margining. Refer to Table 2.

TABLE 2. VOLTAGE MARGINING CONTROLLED BY GPIO1

AND GPIO2

GPIO1

GPIO2

VOUT

L

L

No Change

L

H

+ Delta VOUT

H

L

- Delta VOUT

H

H

Ignored

TABLE 3. VOLTAGE MARGINING/DDR OR TRACKING SUPPLY PIN CONFIGURATION

FUNCTION/MODES

PIN CONFIGURATIONS

COMMENTS

VMSET/MODE

REFOUT

GPIO1/REFIN

GPIO2

Enable Voltage Margining

Pin Connected Connect a 1µF Serves as a general Serves as a

to GND with capacitor for

purpose I/O. Refer to general purpose

resistor. It is bypass of external Table 2

I/O. Refer to

used as VMSET. reference.

Table 2

REFIN or REFOUT functions

will not be available in this

mode. The internal 0.6V

reference is used.

No Voltage Margining. Normal Pin Connected Connect a 1µF

L

L

operation using internal reference. to GND with capacitor for

REFOUT not used.

resistor. It is bypass of external

used as VMSET reference.

No Voltage Margining. Normal

H

Connect a 2.2µF

H

L

operation with internal reference.

capacitor to GND.

Buffered VREFOUT = 0.6V.

No Voltage Margining. External

reference. Buffered VREFOUT =

VREFIN

H

Connect a 2.2µF Connect to an

L

capacitor to GND. external reference

voltage source (0.6V

to 1.25V)

10

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