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ISL6322G Просмотр технического описания (PDF) - Intersil

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ISL6322G Datasheet PDF : 39 Pages
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ISL6322G
Block Diagram
VSEN
RGND
VDIFF
OPEN SENSE
LINE PREVENTION
x1
OVERVOLTAGE
AND
UNDERVOLTAGE
DETECTION
LOGIC
SS/RST/A0
SCL
SDA
I2C
LOGIC
VRSEL
MODE/DAC
SELECT
PGOOD
SOFT-START
AND
FAULT LOGIC
0.2V
LOAD APPLY
TRANSIENT
ENHANCEMENT
CLOCK AND
MODULATOR
WAVEFORM
GENERATOR
EN
0.85V
POWER-ON
RESET
VCC
PVCC
MOSFET
DRIVER
BOOT1
UGATE1
PHASE1
LGATE1
FS
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
REF
FB
COMP
OFS
DYNAMIC
VID
D/A
OFFSET
PWM1
E/A
CHANNEL
CURRENT
IAVG 1
BALANCE
AND CURRENT
N
LIMIT
ISEN1
CH1
CURRENT
SENSE
ISEN2
CH2
CURRENT
SENSE
PWM2
MOSFET
DRIVER
I2C
PH2
DETECT
OCP
OCP
ITRIP
ISEN1+ISEN2
OCP
OCP
2.0V
BOOT2
UGATE2
PHASE2
LGATE2
EN_PH2
IOUT
GND
3
ISEN1- ISEN1+
ISEN2- ISEN2+
FN6715.0
May 22, 2008

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