ISL3685IR Просмотр технического описания (PDF) - Intersil
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производитель
ISL3685IR Datasheet PDF : 19 Pages
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Pinout
ISL3685
ISL3685
(MLF)
TOP VIEW
LNA_VCC1
GND
RX_IN
BIAS1_VCC1
H/L
PE2
PE1
TX_VCC1
GND
TXA_OUT
GND
44 43 42 41 40 39 38 37 36 35 34
1
33
2
32
3
31
4
30
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12 13 14 15 16 17 18 19 20 21 22
RX_MX_OUT-
TX_MX_IN-
GND
RX_LO_DRIVER_VCC1
LO_VCC1
LO_IN-
LO_IN+
TX_LO_DRIVER_VCC1
TX_MX_VCC1
TX_MX_OUT
TX_MX_VCC1
Pin Description
PIN
NAME
DESCRIPTION
1
LNA_VCC1 Low Noise Amplifier Positive Power Supply.
3
RX_IN
Low Noise Amplifier RF Input, internally DC coupled and requires an external blocking capacitor. A shunt capacitor to
ground matches the input for return loss and optimum NF.
4
BIAS1_VCC1 Bias Positive Power Supply for the LNA and Preamplifier.
5
H/L
High or Low Gain Select, controls the LNA high and low gain modes.
6
PE2
This pin along with pin PE1 and bit M(0) of PLL_PE determine which of various operational modes will be active. Please
refer to the Power Enable Truth Table.
7
PE1
This pin along with pin PE2 and bit M(0) of PLL_PE determine which of various operational modes will be active. Please
refer to the Power Enable Truth Table.
8
TX_VCC1 Transmit Amplifier Positive Power Supply, requires a high quality decoupling capacitor and a short return path.
10
TXA_OUT Transmit Amplifier Output, internally matched to 50Ω, requires an external DC blocking capacitor.
12
TX_VCC1 Transmit Amplifier Positive Power Supply.
13
TXA_IN
Transmit Amplifier Input, internally AC coupled.
15
LE
Synthesizer Latch Enable, the serial interface is active when LE is low and the serial data is latched into defined
registers on the rising edge of LE.
16
DATA
Synthesizer Serial Data Input, clocked in on the rising edge of the serial clock, MSB first.
17
CLK
Synthesizer Clock, DATA is clocked in on the rising edge of the serial clock, MSB first.
18
REF_BY
Synthesizer Reference Frequency Input Bypass, internally DC coupled and requires an external bypass to ground
when REF_IN is used as a Single Ended input, requires an external AC coupling capacitor when used as a differential
input.
2
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