IS61NLP102418-200B3 Просмотр технического описания (PDF) - Integrated Silicon Solution

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производитель

IS61NLP102418-200B3

256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE 'NO WAIT' STATE BUS SRAM

Integrated Silicon Solution 

IS61NLP25672/IS61NVP25672

IS61NLP51236/IS61NVP51236

IS61NLP102418/IS61NVP102418

BLOCK DIAGRAM

ISSI ®

x 72: A [0:17] or

x 36: A [0:18] or

x 18: A [0:19]

ADDRESS

REGISTER

A2-A17 or A2-A18 or A2-A19

MODE

A0-A1

BURST

ADDRESS

COUNTER

A'0-A'1

256Kx72; 512Kx36;

1024Kx18

MEMORY ARRAY

K DATA-IN

REGISTER

CLK

CKE

CONTROL

LOGIC K

CE

CE2

CE2

} ADV

WE

BWŸX

(X=a,b,c,d or a,b)

OE

ZZ

CONTROL

REGISTER

DQx/DQPx

WRITE

ADDRESS

REGISTER

WRITE

ADDRESS

REGISTER

K DATA-IN

REGISTER

CONTROL

LOGIC

72, 36 or 18

K OUTPUT

REGISTER

BUFFER

2

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

Rev. G

07/10/06

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