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TDA5153

Pre-amplifier for Hard Disk Drive (HDD) with MR-read/inductive write heads

Philips Electronics 

Philips Semiconductors

Pre-amplifier for Hard Disk Drive (HDD)

with MR-read/inductive write heads

Preliminary specification

TDA5153

1 FEATURES

• Designed for 4 (TDA5153BG) or 6 dual-stripe

MR-read/inductive write heads

• Current bias-current sense architecture

• Single supply voltage (5.0 V ±10%); a separate write

drivers supply pin can be biased from VCC to 8 V +10%

• MR elements connected to ground (GND)

• Equal bias currents in the two MR stripes of each head

• On-chip AC couplings eliminate MR head DC offset

• 3-wire serial interface for programming

• Programmable high-frequency zero-pole gain boost

• Programmable write driver compensation capacitance

• Programmable MR bias currents and write currents

• 1-bit programmable read gain

• Sleep, standby, active and test modes available

• Measurement of head resistances in test mode

• In test mode, one MR bias current may be forced to a

minimum current

• Short write current rise and fall times with near rail-to-rail

voltage swing

• Head unsafe pin for signalling of abnormal conditions

and behaviour

• Low supply voltage write-current inhibit (active or

inactive)

• Supports servo writing

• Provides temperature monitor

• Thermal asperity detection with programmable

threshold level

• Requires only one external resistor.

2 APPLICATIONS

• Hard Disk Drive (HDD).

3 GENERAL DESCRIPTION

The 5.0 V pre-amplifier for HDD described here is

designed for five terminals, dual stripe Magneto-Resistive

(MR)-read/inductive-write heads. The disks of the disk

drive are connected to ground. To avoid voltage

break-through between the heads and the disk, the MR

elements of the heads are also connected to ground. The

symmetry of the dual-stripe head-amplifier combination

automatically distinguishes between the differential

signals such as signals and the common-mode effects like

interference. The latter are rejected by the amplifier.

The IC incorporates read amplifiers, write amplifiers, serial

interface, digital-to-analog converters, reference and

control circuits which operate on a single supply voltage of

5 V ±10%. The output drivers have a separate supply

voltage pin which can be connected to a higher supply

voltage of up to 8 V +10%. The complementary output

stages of the write amplifier allow writing with near

rail-to-rail peak voltages across the inductive write head.

The read amplifier has a low input impedance. The DC

offset between the two stripes of the MR head is eliminated

using on-chip AC coupling. Fast settling features are used

to keep the transients short. As an option, the read

amplifier may be left biased during writing so as to reduce

the duration of these transients even more. Series

inductance in the leads between the amplifier and MR

heads influences the bandwidth which can be

compensated by using a programmable high-frequency

gain-boost (HF zero). HF noise and bandwidth can be

attenuated using a programmable high-frequency

gain-attenuator (HF pole).

On-chip digital-to-analog converters for MR bias currents

and write currents are programmed via a 3-wire serial

interface. Head selection, mode control, testing and servo

writing can also be programmed using the serial interface.

In sleep mode the CMOS serial interface is operational.

Figure 1 shows the block diagram of the device.

4 ORDERING INFORMATION

TYPE

NUMBER

TDA5153X

TDA5153AG;

TDA5153BG

NAME

−

LQFP48

PACKAGE

DESCRIPTION

naked die

plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm

VERSION

−

SOT313-2

1997 Jul 02

3

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