IR2153Z Просмотр технического описания (PDF) - International Rectifier
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IR2153Z Datasheet PDF : 6 Pages
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IR2153Z
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
VB
VS
VHO
VLO
ICC
Definition
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Output Voltage
Supply Current (Note 1)
Min.
VS + 10
—
VS
0
—
Max.
VS + 20
600
VB
VCC
5
Units
V
mA
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 12V, CL = 1000 pF and TA = 25°C unless otherwise specified.
Symbol
tr
tf
tsd
DT
D
Definition
Turn-On Rise Time
Turn-Off Fall Time
Shutdown Propagation Delay
Deadtime
RT Duty Cycle
Min.
—
—
—
—
—
Typ. Max. Units Test Conditions
80 165
35 100 ns
660 —
1.2 —
µs
50 —
%
Typical Connections
IR2153Z
600V
MAX
VCC VB
HO
RT
VS
Shutdown
CT
LO
COM
Note 1:
2
Because of the IR2153’s application specificity toward off-line supply systems, this IC contains a zener clamp
structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC
supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value
resistor connected between the chip VCC and the rectified line voltage and a local decoupling capacitor from
VCC to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. There-
fore, this circuit should not be driven by a DC, low impedance power source of greater than VCLAMP.
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