HA-2850
Test Circuits and Waveforms (Continued)
V+
0.001µF
INPUT
200Ω
1µF
-
+
0.001µF
500Ω
1µF
V-
2kΩ
OUTPUT
PROBE
MONITOR
NOTES:
13. AV = -10.
14. Load Capacitance should be less than 10pF.
15. It is recommended that resistors be carbon composition and that
feedback and summing network ratios be matched to 0.1%.
16. SETTLING POINT (Summing Node) capacitance should be less
than 10pF. For optimum settling time results, it is recommended
that the test circuit be constructed directly onto the device pins.
A Tektronix 568 Sampling Oscilloscope with S-3A sampling
heads is recommended as a settle point monitor.
SETTLING
5kΩ
POINT
SETTLING TIME TEST CIRCUIT
Typical Performance Curves TA = 25oC, VSUPPLY = ±15V, RL = 1kΩ, CL < 10pF, Unless Otherwise Specified
100
475
80
60 AVCL = 1000
OPEN LOOP
40 AVCL = 100
450
20
AVCL = 10
0
AVCL= 1000
AVCL= 100
AVCL = 10
425
0
90
OPEN LOOP
180
1K
10K
100K
1M
10M
100M 500M
FREQUENCY (Hz)
400
5 6 7 8 9 10 11 12 13 14 15
SUPPLY VOLTAGE (±V)
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS GAINS
FIGURE 2. GAIN BANDWIDTH PRODUCT vs SUPPLY VOLT-
AGE
4