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IDT82P2288BB

Octal T1/E1/J1 Long Haul / Short Haul Transceiver

Integrated Device Technology 

IDT82P2288

OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER

Table 49: Interrupt Summary In E1 Mode .................................................................................................................................................................... 73

Table 50: Related Bit / Register In Chapter 3.20.1.2 ................................................................................................................................................... 74

Table 51: Related Bit / Register In Chapter 3.20.2.1 ................................................................................................................................................... 75

Table 52: Related Bit / Register In Chapter 3.20.2.2 ~ Chapter 3.20.2.4 .................................................................................................................... 76

Table 53: APRM Message Format .............................................................................................................................................................................. 77

Table 54: APRM Interpretation .................................................................................................................................................................................... 77

Table 55: Related Bit / Register In Chapter 3.20.3 ...................................................................................................................................................... 78

Table 56: Related Bit / Register In Chapter 3.20.4 & Chapter 3.20.5 .......................................................................................................................... 78

Table 57: Related Bit / Register In Chapter 3.20.6, Chapter 3.20.7 & Chapter 3.21 ................................................................................................... 79

Table 58: Related Bit / Register In Chapter 3.22 ......................................................................................................................................................... 79

Table 59: Related Bit / Register In Chapter 3.23 ......................................................................................................................................................... 80

Table 60: PULS[3:0] Setting In T1/J1 Mode ................................................................................................................................................................ 81

Table 61: LBO PULS[3:0] Setting In T1 Mode ............................................................................................................................................................. 82

Table 62: Transmit Waveform Value For E1 75 Ω ...................................................................................................................................................... 83

Table 63: Transmit Waveform Value For E1 120 Ω .................................................................................................................................................... 83

Table 64: Transmit Waveform Value For T1 0~133 ft ................................................................................................................................................. 84

Table 65: Transmit Waveform Value For T1 133~266 ft ............................................................................................................................................. 84

Table 66: Transmit Waveform Value For T1 266~399 ft ............................................................................................................................................. 85

Table 67: Transmit Waveform Value For T1 399~533 ft ............................................................................................................................................. 85

Table 68: Transmit Waveform Value For T1 533~655 ft ............................................................................................................................................. 86

Table 69: Transmit Waveform Value For J1 0~655ft ................................................................................................................................................... 86

Table 70: Transmit Waveform Value For DS1 0 dB LBO ............................................................................................................................................ 87

Table 71: Transmit Waveform Value For DS1 -7.5 dB LBO ........................................................................................................................................ 87

Table 72: Transmit Waveform Value For DS1 -15.0 dB LBO ...................................................................................................................................... 88

Table 73: Transmit Waveform Value For DS1 -22.5 dB LBO ...................................................................................................................................... 88

Table 74: Related Bit / Register In Chapter 3.24 ......................................................................................................................................................... 89

Table 75: Impedance Matching Value For The Transmitter ........................................................................................................................................ 90

Table 76: Related Bit / Register In Chapter 3.25 & Chapter 3.26 ................................................................................................................................ 90

Table 77: Related Bit / Register In Chapter 3.27.1 ...................................................................................................................................................... 91

Table 78: Related Bit / Register In Chapter 3.27.2 & Chapter 3.27.3 .......................................................................................................................... 94

Table 79: Related Bit / Register In Chapter 3.28 ......................................................................................................................................................... 95

Table 80: Parallel Microprocessor Interface ................................................................................................................................................................ 98

Table 81: Related Bit / Register In Chapter 4 .............................................................................................................................................................. 99

Table 82: IR Code ...................................................................................................................................................................................................... 348

Table 83: IDR ............................................................................................................................................................................................................. 349

Table 84: Boundary Scan (BS) Sequence ................................................................................................................................................................. 349

Table 85: TAP Controller State Description ............................................................................................................................................................... 352

List of Tables

vii

March 22, 2004

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