IDT82P2288(2009) Просмотр технического описания (PDF) - Integrated Device Technology

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производитель

IDT82P2288
(Rev.:2009)

Octal T1/E1/J1 Long Haul / Short Haul Transceiver

Integrated Device Technology 

IDT82P2288

OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER

Table 49: Interrupt Summary In E1 Mode .................................................................................................................................................................... 93

Table 50: Related Bit / Register In Chapter 3.20.1.2 ................................................................................................................................................... 93

Table 51: Related Bit / Register In Chapter 3.20.2.1 ................................................................................................................................................... 95

Table 52: Related Bit / Register In Chapter 3.20.2.2 ~ Chapter 3.20.2.4 .................................................................................................................... 95

Table 53: APRM Message Format .............................................................................................................................................................................. 96

Table 54: APRM Interpretation .................................................................................................................................................................................... 97

Table 55: Related Bit / Register In Chapter 3.20.3 ...................................................................................................................................................... 97

Table 56: Related Bit / Register In Chapter 3.20.4 & Chapter 3.20.5 .......................................................................................................................... 97

Table 57: Related Bit / Register In Chapter 3.20.6, Chapter 3.20.7 & Chapter 3.21 ................................................................................................... 98

Table 58: Related Bit / Register In Chapter 3.22 ......................................................................................................................................................... 99

Table 59: Related Bit / Register In Chapter 3.23 ....................................................................................................................................................... 100

Table 60: PULS[3:0] Setting In T1/J1 Mode .............................................................................................................................................................. 101

Table 61: LBO PULS[3:0] Setting In T1 Mode ........................................................................................................................................................... 101

Table 62: Transmit Waveform Value For E1 75 W .................................................................................................................................................... 102

Table 63: Transmit Waveform Value For E1 120 W .................................................................................................................................................. 103

Table 64: Transmit Waveform Value For T1 0~133 ft ............................................................................................................................................... 103

Table 65: Transmit Waveform Value For T1 133~266 ft ........................................................................................................................................... 104

Table 66: Transmit Waveform Value For T1 266~399 ft ........................................................................................................................................... 104

Table 67: Transmit Waveform Value For T1 399~533 ft ........................................................................................................................................... 105

Table 68: Transmit Waveform Value For T1 533~655 ft ........................................................................................................................................... 105

Table 69: Transmit Waveform Value For J1 0~655ft ................................................................................................................................................. 106

Table 70: Transmit Waveform Value For DS1 0 dB LBO .......................................................................................................................................... 106

Table 71: Transmit Waveform Value For DS1 -7.5 dB LBO ...................................................................................................................................... 107

Table 72: Transmit Waveform Value For DS1 -15.0 dB LBO .................................................................................................................................... 107

Table 73: Transmit Waveform Value For DS1 -22.5 dB LBO .................................................................................................................................... 108

Table 74: Related Bit / Register In Chapter 3.24 ....................................................................................................................................................... 108

Table 75: Impedance Matching Value For The Transmitter ...................................................................................................................................... 109

Table 76: Related Bit / Register In Chapter 3.25 & Chapter 3.26 .............................................................................................................................. 109

Table 77: Related Bit / Register In Chapter 3.27.1 .................................................................................................................................................... 110

Table 78: Related Bit / Register In Chapter 3.27.2 & Chapter 3.27.3 ........................................................................................................................ 113

Table 79: Related Bit / Register In Chapter 3.28 ....................................................................................................................................................... 114

Table 80: Parallel Microprocessor Interface .............................................................................................................................................................. 116

Table 81: Related Bit / Register In Chapter 4 ............................................................................................................................................................ 117

Table 82: IR Code ...................................................................................................................................................................................................... 340

Table 83: IDR ............................................................................................................................................................................................................. 340

Table 84: Boundary Scan (BS) Sequence ................................................................................................................................................................. 340

Table 85: TAP Controller State Description ............................................................................................................................................................... 343

List of Tables

8

March 04, 2009

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