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IDT82P2281 Просмотр технического описания (PDF) - Integrated Device Technology

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IDT82P2281
IDT
Integrated Device Technology IDT
IDT82P2281 Datasheet PDF : 375 Pages
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IDT82P2281
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
3.8.2.3.3 National Bit Extraction ................................................................................................................................... 33
3.8.2.3.4 National Bit Codeword Extraction .................................................................................................................. 33
3.8.2.3.5 Extra Bit Extraction ........................................................................................................................................ 33
3.8.2.3.6 Remote Signaling Multi-Frame Alarm Indication Bit Extraction ..................................................................... 33
3.8.2.3.7 Sa6 Code Detection Per ETS 300 233 .......................................................................................................... 33
3.8.2.4 V5.2 Link .......................................................................................................................................................................... 34
3.8.2.5 Interrupt Summary ............................................................................................................................................................ 34
3.9 PERFORMANCE MONITOR ........................................................................................................................................................................ 36
3.9.1 T1/J1 Mode ...................................................................................................................................................................................... 36
3.9.2 E1 Mode .......................................................................................................................................................................................... 38
3.10 ALARM DETECTOR .................................................................................................................................................................................... 40
3.10.1 T1/J1 Mode ...................................................................................................................................................................................... 40
3.10.2 E1 Mode .......................................................................................................................................................................................... 42
3.11 HDLC RECEIVER ......................................................................................................................................................................................... 43
3.11.1 HDLC Channel Configuration ........................................................................................................................................................ 43
3.11.2 Two HDLC Modes ........................................................................................................................................................................... 43
3.11.2.1 HDLC Mode ...................................................................................................................................................................... 43
3.11.2.2 SS7 Mode ......................................................................................................................................................................... 45
3.12 BIT-ORIENTED MESSAGE RECEIVER (T1/J1 ONLY) .............................................................................................................................. 47
3.13 INBAND LOOPBACK CODE DETECTOR (T1/J1 ONLY) ........................................................................................................................... 47
3.14 ELASTIC STORE BUFFER .......................................................................................................................................................................... 48
3.15 RECEIVE CAS/RBS BUFFER ..................................................................................................................................................................... 48
3.15.1 T1/J1 Mode ...................................................................................................................................................................................... 48
3.15.2 E1 Mode .......................................................................................................................................................................................... 49
3.16 RECEIVE PAYLOAD CONTROL ................................................................................................................................................................. 51
3.17 RECEIVE SYSTEM INTERFACE ................................................................................................................................................................. 53
3.17.1 T1/J1 Mode ...................................................................................................................................................................................... 53
3.17.1.1 Receive Clock Master Mode ............................................................................................................................................ 53
3.17.1.1.1 Receive Clock Master Full T1/J1 Mode ......................................................................................................... 53
3.17.1.1.2 Receive Clock Master Fractional T1/J1 Mode ............................................................................................... 53
3.17.1.2 Receive Clock Slave Mode .............................................................................................................................................. 54
3.17.1.3 Receive Multiplexed Mode ............................................................................................................................................... 55
3.17.1.4 Offset ................................................................................................................................................................................ 55
3.17.1.5 Output On RSD/MRSD & RSIG/MRSIG ........................................................................................................................... 57
3.17.2 E1 Mode .......................................................................................................................................................................................... 58
3.17.2.1 Receive Clock Master Mode ............................................................................................................................................ 58
3.17.2.1.1 Receive Clock Master Full E1 Mode ............................................................................................................. 58
3.17.2.1.2 Receive Clock Master Fractional E1 Mode ................................................................................................... 58
3.17.2.2 Receive Clock Slave Mode .............................................................................................................................................. 58
3.17.2.3 Receive Multiplexed Mode ............................................................................................................................................... 59
3.17.2.4 Offset ................................................................................................................................................................................ 59
3.17.2.5 Output On RSD/MRSD & RSIG/MRSIG ........................................................................................................................... 59
3.18 TRANSMIT SYSTEM INTERFACE .............................................................................................................................................................. 60
3.18.1 T1/J1 Mode ...................................................................................................................................................................................... 60
3.18.1.1 Transmit Clock Master Mode ............................................................................................................................................ 60
3.18.1.1.1 Transmit Clock Master Full T1/J1 Mode ........................................................................................................ 60
3.18.1.1.2 Transmit Clock Master Fractional T1/J1 Mode .............................................................................................. 61
3.18.1.2 Transmit Clock Slave Mode ............................................................................................................................................. 61
3.18.1.3 Transmit Multiplexed Mode .............................................................................................................................................. 62
3.18.1.4 Offset ................................................................................................................................................................................ 62
3.18.2 E1 Mode .......................................................................................................................................................................................... 65
3.18.2.1 Transmit Clock Master Mode ............................................................................................................................................ 65
3.18.2.1.1 Transmit Clock Master Full E1 Mode ............................................................................................................ 65
3.18.2.1.2 Transmit Clock Master Fractional E1 Mode .................................................................................................. 65
Table of Contents
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October 7, 2003

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