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IDT82P2281 Просмотр технического описания (PDF) - Integrated Device Technology

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IDT82P2281
IDT
Integrated Device Technology IDT
IDT82P2281 Datasheet PDF : 375 Pages
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IDT82P2281
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
clock
RTIP 1
RRING
2
3
5
V
7
4
6
Bipolar violation
Figure 6. AMI Bipolar Violation Error
clock
RTIP
2
RRING 1
3
4
6
8
8 consecutive
5
zeros
7
9
Excessive zero
Figure 7. B8ZS Excessive Zero Error
Code violation
clock
RTIP 1
3
5
4 consecutive
RRING
2
zeros
4
V
V6
Excessive zero
Figure 8. HDB3 Code Violation & Excessive Zero Error
3.7.3 LOS DETECTION
The Loss of Signal (LOS) Detector monitors the amplitude and den-
sity of the received signal. When the received signal is below an ampli-
tude for continuous intervals, the LOS is detected. When the received
signal is above the amplitude and the density of marks meets the
requirement, the LOS is cleared.
The different criteria for LOS Declaring/Clearing are illustrated in
Table 9 and Table 10. In T1/J1 mode, the LOS detection supports ANSI
T1.231 and I.431. In E1 mode, the LOS detection supports ITU-T G.775
and I.431. The criteria are selected by the LAC bit.
When the LOS is detected, it will be indicated by the LOS_S bit.
Selected by the LOS_IES bit, a transition from '0' to '1' on the LOS_S bit
or any transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the LOS_S bit will set
the LOS_IS bit to ‘1’. When the LOS_IS bit is ‘1’, an interrupt will be
reported by the INT pin if enabled by the LOS_IE bit.
During LOS, if the RAISE bit is set to ‘1’, all ’One’s will be inserted
to the received data stream.
Functional Description
18
October 7, 2003

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